Hi,

This is a short diff to add "machine sysregs" to ddb on amd64 (plus it also prints out gsbase/kgsbase). This command is available on i386 but not amd64. I swear I remember discussing this with mlarkin at some point but I couldn't find a previous patch for it on tech@. If I missed it somehow, I am super sorry, and please hit me with the search stick.

This command is mostly useful if you're futzing with page tables or GDT/IDT setup etc, but it's also useful for sanity-checking state generally sometimes, and quite useful for teaching demos showing how it all works (which is the main reason I want it right now).



Index: sys/arch/amd64//amd64/db_interface.c
===================================================================
RCS file: /cvs/./src/sys/arch/amd64/amd64/db_interface.c,v
retrieving revision 1.35
diff -u -p -r1.35 db_interface.c
--- sys/arch/amd64//amd64/db_interface.c        6 Nov 2019 07:34:35 -0000       
1.35
+++ sys/arch/amd64//amd64/db_interface.c        31 Aug 2021 08:12:06 -0000
@@ -46,6 +46,7 @@
 #include <machine/cpuvar.h>
 #include <machine/i82093var.h>
 #include <machine/atomic.h>
+#include <machine/specialreg.h>

 #include <ddb/db_sym.h>
 #include <ddb/db_command.h>
@@ -160,6 +161,45 @@ db_ktrap(int type, int code, db_regs_t *
        return (1);
 }

+void
+db_sysregs_cmd(db_expr_t addr, int have_addr, db_expr_t count, char *modif)
+{
+       int64_t idtr, gdtr;
+       uint64_t cr;
+       uint16_t ldtr, tr;
+       uint64_t gsb;
+
+       __asm__ volatile("sidt %0" : "=m" (idtr));
+       db_printf("idtr:   0x%08llx/%04llx\n", idtr >> 16, idtr & 0xffff);
+
+       __asm__ volatile("sgdt %0" : "=m" (gdtr));
+       db_printf("gdtr:   0x%08llx/%04llx\n", gdtr >> 16, gdtr & 0xffff);
+
+       __asm__ volatile("sldt %0" : "=g" (ldtr));
+       db_printf("ldtr:   0x%04x\n", ldtr);
+
+       __asm__ volatile("str %0" : "=g" (tr));
+       db_printf("tr:     0x%04x\n", tr);
+
+       __asm__ volatile("movq %%cr0,%0" : "=r" (cr));
+       db_printf("cr0:    0x%016llx\n", cr);
+
+       __asm__ volatile("movq %%cr2,%0" : "=r" (cr));
+       db_printf("cr2:    0x%016llx\n", cr);
+
+       __asm__ volatile("movq %%cr3,%0" : "=r" (cr));
+       db_printf("cr3:    0x%016llx\n", cr);
+
+       __asm__ volatile("movq %%cr4,%0" : "=r" (cr));
+       db_printf("cr4:    0x%016llx\n", cr);
+
+       gsb = rdmsr(MSR_GSBASE);
+       db_printf("gsb:    0x%016llx\n", gsb);
+
+       gsb = rdmsr(MSR_KERNELGSBASE);
+       db_printf("kgsb:   0x%016llx\n", gsb);
+}
+

 #ifdef MULTIPROCESSOR
 void
@@ -368,6 +408,7 @@ struct db_command db_machine_command_tab
        { "startcpu", db_startproc_cmd,       0,      0 },
        { "stopcpu",  db_stopproc_cmd,        0,      0 },
        { "ddbcpu",   db_ddbproc_cmd,         0,      0 },
+       { "sysregs",  db_sysregs_cmd,         0,      0 },
 #endif
 #if NACPI > 0
        { "acpi",     NULL,                   0,      db_acpi_cmds },

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