On Sat, Apr 09, 2022 at 03:28:14PM +0200, Stefan Sperling wrote:
> On Sat, Apr 09, 2022 at 12:47:56PM +0200, Sven Wolf wrote:
> > Hi Stefan,
> >
> > sorry, I'm not sure how I can get the sc_hw_rev value.
> > Hopefully this is the requested value:
> >
> > iwx0: hw rev 0x350, fw ver 67.8f59b80b.0
>
> This is not the "QuZ" (0x354) hardware revision.
So this is in fact very complicated.
Intel changed the layout of hw revision ID bits in hardware, but the
Linux driver had a workaround (which iwx is using as well) to store these
bits in the previous format. Later they changed the Linux driver again,
and now our definition of "QuZ" is different from that of Linux.
I cannot be sure anymore if our code is doing the right thing :-/
As sthen points out, please show sc_hw_rev without any of its bits
masked out, with a patch like this:
diff a26af1db5d30d7a58f91742886569d0d8891b827 /usr/src
blob - 2e96219c0dcfeaa4d24912b7e16f22dd617fe828
file + sys/dev/pci/if_iwx.c
--- sys/dev/pci/if_iwx.c
+++ sys/dev/pci/if_iwx.c
@@ -9483,6 +9483,7 @@ iwx_preinit(struct iwx_softc *sc)
printf("%s: hw rev 0x%x, fw ver %s, address %s\n",
DEVNAME(sc), sc->sc_hw_rev & IWX_CSR_HW_REV_TYPE_MSK,
sc->sc_fwver, ether_sprintf(sc->sc_nvm.hw_addr));
+ printf("sc_hw_rev=%x\n", sc->sc_hw_rev);
if (sc->sc_nvm.sku_cap_11n_enable)
iwx_setup_ht_rates(sc);
