include cpuid 0 string in dmesg for fw_update
Intel CPUs used to have brand strings such as
cpu0: Intel(R) Pentium(R) M processor 1200MHz ("GenuineIntel" 686-class) 1.20
GHz
cpu0: Intel(R) Core(TM) i7-5600U CPU @ 2.60GHz, 2494.61 MHz, 06-3d-04
recent CPUs use
cpu0: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz, 30009.37 MHz, 06-8c-01
cpu0: 12th Gen Intel(R) Core(TM) i5-12400, 4390.71 MHz, 06-97-02
cpu0: 12th Gen Intel(R) Core(TM) i7-1260P, 1995.55 MHz, 06-9a-03
after the diff:
amd64:
cpu0: GenuineIntel, 12th Gen Intel(R) Core(TM) i7-1260P, 1995.55 MHz, 06-9a-03
cpu0: AuthenticAMD, AMD Ryzen 5 2600X Six-Core Processor, 3593.83 MHz, 17-08-02
i386:
cpu0: GenuineIntel, Intel(R) Pentium(R) M processor 1.60GHz (686-class) 1.60
GHz, 06-0d-06
changes the output of hw.model on i386 to not include the cpuid 0 string
Index: sys/arch/amd64/amd64/identcpu.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/identcpu.c,v
retrieving revision 1.125
diff -u -p -r1.125 identcpu.c
--- sys/arch/amd64/amd64/identcpu.c 12 Jul 2022 04:46:00 -0000 1.125
+++ sys/arch/amd64/amd64/identcpu.c 24 Jul 2022 05:14:07 -0000
@@ -516,6 +516,11 @@ identifycpu(struct cpu_info *ci)
int i;
char *brandstr_from, *brandstr_to;
int skipspace;
+ uint32_t vendor_regs[3];
+ char vendor[13];
+
+ CPUID(0, dummy, vendor_regs[0], vendor_regs[2], vendor_regs[1]);
+ strlcpy(vendor, (char *)vendor_regs, sizeof(vendor));
CPUID(1, ci->ci_signature, val, dummy, ci->ci_feature_flags);
CPUID(0x80000000, ci->ci_pnfeatset, dummy, dummy, dummy);
@@ -605,7 +610,7 @@ identifycpu(struct cpu_info *ci)
freq = cpu_freq(ci);
- printf("%s: %s", ci->ci_dev->dv_xname, mycpu_model);
+ printf("%s: %s, %s", ci->ci_dev->dv_xname, vendor, mycpu_model);
if (freq != 0)
printf(", %llu.%02llu MHz", (freq + 4999) / 1000000,
Index: sys/arch/i386/i386/machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/i386/i386/machdep.c,v
retrieving revision 1.650
diff -u -p -r1.650 machdep.c
--- sys/arch/i386/i386/machdep.c 12 Jul 2022 05:45:49 -0000 1.650
+++ sys/arch/i386/i386/machdep.c 24 Jul 2022 04:45:20 -0000
@@ -1891,19 +1891,18 @@ identifycpu(struct cpu_info *ci)
if (cachesize > -1) {
snprintf(cpu_model, sizeof(cpu_model),
- "%s (%s%s%s%s-class, %dKB L2 cache)",
- cpu_brandstr,
- ((*token) ? "\"" : ""), ((*token) ? token : ""),
- ((*token) ? "\" " : ""), classnames[class], cachesize);
+ "%s (%s-class, %dKB L2 cache)",
+ cpu_brandstr, classnames[class], cachesize);
} else {
snprintf(cpu_model, sizeof(cpu_model),
- "%s (%s%s%s%s-class)",
- cpu_brandstr,
- ((*token) ? "\"" : ""), ((*token) ? token : ""),
- ((*token) ? "\" " : ""), classnames[class]);
+ "%s (%s-class)",
+ cpu_brandstr, classnames[class]);
}
- printf("%s: %s", cpu_device, cpu_model);
+ if (*token)
+ printf("%s: %s, %s", cpu_device, token, cpu_model);
+ else
+ printf("%s: %s", cpu_device, cpu_model);
if (ci->ci_feature_flags && (ci->ci_feature_flags & CPUID_TSC)) {
/* Has TSC, check if it's constant */
Index: usr.sbin/fw_update/patterns.c
===================================================================
RCS file: /cvs/src/usr.sbin/fw_update/patterns.c,v
retrieving revision 1.3
diff -u -p -r1.3 patterns.c
--- usr.sbin/fw_update/patterns.c 10 Mar 2022 07:12:13 -0000 1.3
+++ usr.sbin/fw_update/patterns.c 24 Jul 2022 05:36:11 -0000
@@ -94,7 +94,7 @@ main(void)
printf("%s\n", "bwfm");
printf("%s\n", "bwi");
printf("%s\n", "intel");
- printf("%s\n", "intel ^cpu0: Intel");
+ printf("%s\n", "intel ^cpu0: GenuineIntel");
printf("%s\n", "inteldrm");
print_devices("inteldrm", i915_devices, nitems(i915_devices));
printf("%s\n", "ipw");
