On macppc and powerpc64, I don't think we need to disable interrupts during dec_rearm(). ppc_mtdec() and mtdec() are just:
mtspr dec,<register> or mtdec <register> which is atomic. Tested on macpcc (my G4). Kernel boots, system has been up for over 24 hours doing a parallel `make build`. When I wrote dec_rearm() I think I was just imitating dec_trigger(). In that case, we *do* need to disable interrupts because we're doing mtspr twice. ok? Index: macppc/macppc/clock.c =================================================================== RCS file: /cvs/src/sys/arch/macppc/macppc/clock.c,v retrieving revision 1.52 diff -u -p -r1.52 clock.c --- macppc/macppc/clock.c 27 Jan 2023 22:13:48 -0000 1.52 +++ macppc/macppc/clock.c 28 Jan 2023 23:20:06 -0000 @@ -248,16 +248,13 @@ void dec_rearm(void *unused, uint64_t nsecs) { uint32_t cycles; - int s; if (nsecs > dec_nsec_max) nsecs = dec_nsec_max; cycles = (nsecs * dec_nsec_cycle_ratio) >> 32; if (cycles > UINT32_MAX >> 1) cycles = UINT32_MAX >> 1; - s = ppc_intr_disable(); ppc_mtdec(cycles); - ppc_intr_enable(s); } void Index: powerpc64/powerpc64/clock.c =================================================================== RCS file: /cvs/src/sys/arch/powerpc64/powerpc64/clock.c,v retrieving revision 1.8 diff -u -p -r1.8 clock.c --- powerpc64/powerpc64/clock.c 27 Jan 2023 22:14:43 -0000 1.8 +++ powerpc64/powerpc64/clock.c 28 Jan 2023 23:20:06 -0000 @@ -59,7 +59,6 @@ void cpu_startclock(void); void dec_rearm(void *unused, uint64_t nsecs) { - u_long s; uint32_t cycles; if (nsecs > dec_nsec_max) @@ -67,9 +66,7 @@ dec_rearm(void *unused, uint64_t nsecs) cycles = (nsecs * dec_nsec_cycle_ratio) >> 32; if (cycles > UINT32_MAX >> 1) cycles = UINT32_MAX >> 1; - s = intr_disable(); mtdec(cycles); - intr_restore(s); } void