Hello,
Please find details of my consultant *Harsh** *for your requirements. If you
find him suitable please let me know
§ Supported unit testing for production and yield enhancement for
Altera’s 65nm StratixIII FPGA products.
§ Coordinated planning, development, implementation and execution of
volume characterization for StratixIII FPGAs and worked within and across
departments to setup data analysis system for the program.
§ Performed new product introduction and rollout activities, and
supported first silicon checkout/debug for StratixIII FPGAs.
§ Developed test plan and test program for characterization of speed and
power management feature in StratixIII FPGAs.
§ Performed electrical failure analysis using DFT for fault localization
and physical failure analysis in FPGA products.
§ Carried out functional verification for regulators in StratixIII
FPGAs.
§ Supported wafer sort production and yield enhancement for
Hardcopy Stratix products.
*AREAS OF EXPERTISE*
§ Test Planning and DFT**
§ Logic Design and RTL Design
§ Silicon Characterization and Verification**
§ Silicon Bring-Up and Debug
§ Yield Enhancement**
§ Electrical Failure Analysis and Fault Localization
§ Project Planning and Implementation**
§ Data Collection and Analysis
*TECHNICAL SKILLS*
* ** **HDL:
*Verilog,
VHDL
*Design Entry Tools: *Xilinx ISE Foundation,
Altera Quartus II, Cadence-Schematic Capture
*Simulators: *VCS, Mentor Graphics – ModelSim,
HSPICE, Synopsis Design Compiler
*Test Tools: *Automatic Test Equipment (ATE),
Wafer Probe Station, Unit Test Handler
*Programming Languages: *C, C++, TCL, Perl, Assembly Language
(8051/85/86), BASIC
*Operating System: *Windows 9x/ME/NT/2000/XP, DOS, UNIX,
Mac OS X
Consultant Details
Name
Harsh
Available
Immediately
Located
Sunnyvale, CA
Relocation
Open
Work status
H1B
Rate
Open
*Send requirements to [email protected] ONLY!!!*
--
Thanks & Best Regards,
Charlotte V
Macrotech (USA) Inc.
Direct Number: 510-263-7919
E-Mail: [email protected]
URL :- www.macrotech.net
Yahoo IM : [email protected]
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