> Or use 74193 synchronous counters. You will have only one gate per > chip worth of jitter.
I think there should be only one gate of jitter per string of chips. The whole chain is synchronous. You have to wait for the carry to settle, then they all change on the same clock edge. I'm assuming you are using something like the top bit of the counter for the PPS signal rather than the ripple carry output which may be glitchy anyway. Of course, now you have a clock distribution problem. Might be simpler to use a PIC or CPLD. :) -- The suespammers.org mail server is located in California. So are all my other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited commercial e-mail to my suespammers.org address or any of my other addresses. These are my opinions, not necessarily my employer's. I hate spam. _______________________________________________ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts