John Miles wrote: > Definitely an interesting chart. I don't know how much stock I'd put in it, > though. The figures cited are, in some cases, much worse than those > published elsewhere and observed personally. > > I didn't look at all of the test circuits, but there are more things wrong > with the LT1016 test circuit on page 19 than in the entire QEX article that > caught so much flak recently. :-) > > -- john, KE5FX > > > >> -----Original Message----- >> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] >> Behalf Of Richard H McCorkle >> Sent: Sunday, October 29, 2006 10:33 PM >> To: Discussion of precise time and frequency measurement >> Subject: Re: [time-nuts] Allan Deviation -> continuing saga... >> >> >> I had been using the Shera HC4046 input circuit for my 10811 >> GPSDO input until I read the test results in the LPRO manual >> http://www.symmetricom.com/media/pdf/manuals/man-lpro.pdf >> (Table 3-1 on Pg 18) showing the results of testing various TTL >> converters for relative phase noise. The conversion techniques >> document at http://www.wenzel.com/documents/waveform.html >> has a circuit for using a tuned LC network to increase the sine >> output from an oscillator to drive a biased gate input. I did some >> testing of my own and found that using a biased AC04 gate using >> the Wenzel circuit with no input resistor, C = 100pf, L = 2.7uh, >> input directly from the 10 MHz 10811 gave the lowest phase noise >> combination for my GPSDO input. >> You may want to give this a try. >> >> Enjoy! >> Richard >> >> > > > _______________________________________________ > time-nuts mailing list > time-nuts@febo.com > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > The 100K+100pF in series with the comparator input must really help in elevating the noise level.
The 10811 output stage has an ~ 50 ohm output impedance (shunt resistor across transformer primary in the output transistor collector.) Even with a Q of around 3 or so the phase shift tempco of the Wenzel circuit can be significant if low tempco components(L +C) are not used. For a GPSDO the PPS timing jitter usually swamps the sine to TTL/CMOS circuit jitter. Bruce _______________________________________________ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts