In a message dated 6/14/2007 10:03:40 Pacific Daylight Time, [EMAIL PROTECTED] writes:
>Just a quick note about the HP 54720D. If you have 2 of the 4Gs plugins >installed & are measuring a differential ECL signal; this combination yields ><2pS rms jitter. I spent many hours characterizing clock gen/dist circuits >for the HP PARisc family of processors; periodic noise floor confirmation >was essential for high confidence results. >Regards, >Pete Rawson Hi Pete, That's pretty good performance! I have the 2G, 4G, and the 8Gs/s plug-ins, and use the 54701A probes, but I only get down to about 60ps jitter even after calibrating the mainframe and plug-ins. I typically measure single-ended outputs, but could also measure the FireFox Signal Generator differential LVDS outputs. Is measuring differentially the trick? Or not using the FET probes? How can you get that low? What's the setup you use for this measurement? thanks, Said ************************************** See what's free at http://www.aol.com. _______________________________________________ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
