John Miles wrote: > Right; when the thumbswitches are toggled, the RC integrators will slow down > the edges into pins 9-11. Sometimes CMOS parts will latch up or otherwise > fail to reliably with slow edges -- it probably comes down to the > "complementary" thing, where both halves of a totem pole can turn on > erratically during a slow transition. > > I have seen large capacitors used on TTL MUXes for EMI suppression, but > never on CMOS. I have a feeling 100 pF would be safer and still adequate. > Probably no big deal, but if you want to be anal about it, it could pay to > check the edge-time specs for the HC family. > > -- john, KE5FX > > During a transition a CMOS inverter acts as an amplifier, the gain can be high with a buffered input where 2 or more inverters are cascaded. Thus any noise riding on a slowly slewing input can be amplified considerably as the input signal passes through Vcc/2 where a CMOS inverter small signal gain is maximum.
Bruce _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
