> Mike > Note: I gave you a simple example of why it is not possible to > just buffer the High Freq osc . The actual working get a bit more > complicated.
> In short when it is time to give out the next pulse whether it is > 1 Hz or 100 Hz It sends it outs as close as possible to the > correct time, using some internal clock. What I have seen on the > Oncore is that this causes a peak of +- 50ns of jitter. It works > the same with the 100Hz or the 1 Hz, both have the same peak to > peak rising edge jitter, which is different for each pulse sent. > The 1Hz timing error message it sends out has little to do with > the 100 Hz timing. > And is not relevant when using the 100Hz except for a few advanced > alising issues. > I hope that answers your questions. Can I ask why the interest? > Warren Ok, it seems they are calculating the best time for each 100Hz pulse individually. That makes life a bit easier for a PLL. My interest is I have a totally new way of locking to the 1PPS pulse that should improve the performance dramatically. The question is would it also work with a 100Hz signal. The answer is yes. It would also work with a 10KHz signal, but this would require a bit more horsepower. I was planning on using a simple inexpensive microprocessor for everything but I don't know if it would be fast enough to do 10KHz. But there's not many of those around anymore, are there? Best Regards, Mike Monett _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
