Luis Luis Cupido wrote: > Bruce, > > There is a trick... > That JTAG interface made with a 74HC244 is > powered from the target board, > If the target board runs at 5v so it will work > at 5v. No doubts here... > > But if the target runs at 3v3 the 74HC244 gets powered > at 3v3 (and it works fine, no need for the target > device to be tolerant to anything, it gets within > whatever VDD it uses...) > and the 74HC244 seems to be tolerant to whatever comes > out of the PC LPT port, but has a few series resistors though. > > The current flowing in the input protection diodes of the 74HC244 needs to be limited to protect both the 74NC244 and the driving device in the PC. The potential increased jitter when current flows in the protection diodes isn't significant here. > Amazingly it even works at 2v5 ! > > Since 74HC244 is specified to work with power supply range of 2V to 6V that isn't too surprising as long as the ~ 4x increase in propagation delay when going from a 5V supply to a 2.5V supply is acceptable. With a power supply below 2.5V the 74HC244 output swing wont meet the upper TTL threshold of the parallel port input, > The byteblasterMV from Altera is just like that and it > works great, and programs from the small CPLDs up to > most of the FPGA's (except for some more recent ones that > require someting else... but is not a voltage issue). > > I'm running one for ages now with zero issues in both > 5v chips and 3v3 chips. > > I even made a byteblasterII (to use on the more recent FPGA's) > with the same 74HC244 (adding a few bits to the > original byteblasterMV for the additional features required) > and it works just fine even with Cyclone devices. > > Luis Cupido. > ct1dmk. > > > > Bruce Griffiths wrote: > >> Luis Cupido wrote: >> >>> >>> >>>> The CPLDs are programmed via the JTAG port. >>>> Suitable JTAG programming cables are readily availble. >>>> >>>> >>> Or you can build one to use the LPT port of your PC using just a 74HC244. >>> >>> >>> Luis Cupido. >>> ct1dmk. >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts@febo.com >>> To unsubscribe, go to >>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >>> >>> >> Luis >> >> Using a 74HC244 may be somewhat problematic with CPLDs that don't have >> 5V tolerant inputs. >> Even when using a device with 5V tolerant inputs a 74HCT244 may be more >> suitable for translating LVCMOS logic level outputs from the CPLD. >> >> Bruce >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > Bruce
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