Hi, I'm cobbling together a very basic PLL GPSDO with components I have to hand which means I'm pushing my luck as far as the loop filter values are concerned.
These are - N = 1000 (10kHz ref from a Jupiter-T), Kv = 27Hz/V (10MHz Motorola VC-TCXO), Kp = 0.4V/rad from a 74HCT9046 type-II PD with charge-pump. >From these I've worked out some values graphically and with a couple of apps I've found. They are an old DOS program by KD9JQ and a web one at - http://www.aubraux.com/design/pll-design-tool.php The first tells me I need some gain between the loop-filter and the VCO, the second (the third order active choice) seems (I think) to have the capacitor values the wrong way round. My own efforts suggest I can get away with the values I've calculated but with a lower loop bandwidth and longer lock-up time than I'd like. The op-amp I'll be using for the filter, or extra DC gain for the VCO, will be an OPA-703. How badly would sticking a gain block between the filter and the VCO screw things up noise-wise (if at all)? Any thoughts on getting out of the 'low resource' hole I've dug would also be much appreciated. BTW, I'm not pushing any envelopes and my previous projects, with different components, have worked out reasonably well Cheers - Joe G3LLV _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.