(mostly for entertainment value)

As the talk fell on what is a weekend project for timenuts, here is my Easter project.

I have previously built a few GPSDOs with my own home-rolled OCXOs. The VC-OCXOs are a problem: I run into linearity problems, noise, the residue of the flux changing with time, and DAC drift. Voltage control is annoying.

So, I built a PLL that will take a 14.7456MHz inaccurate non-adjustable OCXO (something that does not have a large common denominator with 20MHz) and generate 20MHz with 1E-12 or arbitrarily better resolution.

The method is this:
A microcontroller is clocked from a 20MHz VCXO. It samples the 14.7MHz using a flipflop (something I did before), calculates the phase from a number of samples (211ps resolution single shot, 22ps multiple), calculates the predicted phase at the phase acquisition time (it turns rapidly as there is a 5.3MHz beat), and uses the difference to lock the 20MHz VCXO.
The whole thing, with the exception of the VCXO, is software.

Stepping the synthesizer in 1E-12 steps is strangely satisfying. So is plotting the noise, as the VCXO is deliberately awful; The close-in noise (30ms tau) is the VCXO done with the microcontroller's built-in oscillator, above that it is that of the OCXO.

http://n1.taur.dk/timenuts/synth_v2.pdf
(2-hour very much draft version - you may want to skip to the very last page)

Probably not a new design, but I did re-invent it.
Proper measurements will have to wait a few weeks.

/Kasper Pedersen

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