Bob, I might shed some light on this topic, but my comments apply only to a few measurements made in my shop, not part of any PLL scheme. My intent was to determine the apparent noise floor of a Minicircuits SYPD-2 phase detector; a low offset, low conversion loss, DBM. The SYPD-2 IF port was terminated in 600 ohms in parallel with 0.1uF.
The SYPD-2 was first characterized for DC output sensitivity with 10MHz @+7dBm on RF & 10.0001MHz @+7dBm on LO. At this drive level, the IF output is triangular & the "gain" was found to be 800 mV/Rad at 0VDC. I did not perform a tolerance analysis on this measurement & can only estimate the error at +/- 40mV/Rad. The 90 deg offset of the SYPD-2 was measured at < 500uV using +7dBm input power to both RF & LO ports. This measurement was performed to monitor the 90 deg offset DC for any obvious instability which might make lower level readings useless; the offset was stable to +/- 2uV over several minutes. Finally, the mixer was driven with +7dBm at both ports, but the LO port signal was delayed by a 90 deg hybrid splitter + a 500ps, DC to 2GHz, adjustable phase shifter. This configuration allows very fine (5K part settable resolution) adjustment to reach 0VDC output from the SYPD-2. The DC output stability was +/- 4uV/ minute after allowing an hour to reach thermal & mechanical equilibrium (& having no room temperature transients from my heating system). If the phase sensitivity can be assumed to scale down linearly, then 4uV resolution = 5uRad (80fs) @ 10MHz. With more care, or better equipment, <10fs resolution might be possible; but it will be difficult. Without knowing the noise type involved, it's unclear what benefit might be provided by averaging. More work needs to be done. Pete Rawson _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
