On 07/12/2010 05:43 PM, paul swed wrote:
Looks like a good read.
It is a good read to get overview. When I saw it first most of it I had gather through other exercises. but it should not prohibit others from learn from it.
The digital interpolator in Figure 7 using delays is slightly incorrect thought, it is not one set of delays... it has delays both in clock and signal legs. It lives on the delay difference between the paths. The implementation of HP5371A/5372A also includes delay-trimmers. It is essentially a time-difference flash-converter.
Anyway, do read that paper! Cheers, Magnus _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
