Gentlemen, the pros and cons of DDS chips and how to improve them have been discussed here from time to time. Most of the improvements have the aim to remove spurs out of the power spectrum or to reduce the noise level. Yesterday I run into a thing that may make it very qestionable whether DDS based circuitry is in general good for precise timing applications.
I have setup a AD9850 which is clocked from my Z3805 reference. Since the clocking involves a sine-cmos conversion (currently done with 74HC4046 as described by Shera et al) and a second sine-cmos conversion (also 74HC4046) behind the reconstruction lowpass of the DDS (DDS ouput serves as reference input of an ADF4002 PLL) I wanted to check the AD of the cmos output signal and later test whether there was any improvement by using 74AC4046 The DDS was set to app. 1 MHz. For a 1 MHz output @ 10 MHz clock with 4 byte accumulator width the necessary frequency tuning word is 2^32/10. But since 2^32 is a power of two its one and only prime factor is "2" and it is not divideable without rest by any integer that is not a power of two itself. 2^32 is 4,294,967,296 so the closest integer to 2^32/10 is 429,496,730 which produces a frequency offset of +0.000931322574615479 Hz against 1.0 MHz. I compared this signal with a 1,000,000.001 MHz signal coming from my HP3325 which itself is also locked to the Z3805. I used my SR620 in high resolution mode to compare the signals. That is: The counter is armed by its own 1 kHz reference signal and measures exactly 1000 start/stop time intervals per second between its start/stop inputs which are fed from the two 1 MHz sources. Then the counter averages over the 1000 samples which improves the counter's noise by app. SQRT(1000) = app. 32. which results in a close picosecond resolution @ 1 Hz sample rate for the 1000 average. The results of this measurement is shown in http://www.ulrich-bangert.de/Plot1.pdf When the linear trend resulting from the small frequency difference is removed the plot looks like http://www.ulrich-bangert.de/Plot2.pdf which shows an unexpected very regular pattern. Indeed a auto correlation computation reveals that the measured signal is highly self-correlated at even multiples of about 50 s or so and highly anti-correlated at odd multiples of 50 s or so. See yourself in http://www.ulrich-bangert.de/Plot3.pdf This regular pattern generates this nasty sigma-tau: http://www.ulrich-bangert.de/Plot4.pdf The question is: Where does it come from???? Well, lets have a look into details: The accumulation process starts with a value of zero. After 10 accumulations a new period of the sythesized wave starts. However, the phase accumulator does not start at zero again, because in 10 accumulations we accumulated 10 * 429,496,730 = 4,294,967,300 and the phase accumulator overflow happened at 4,294,967,296 - 1. The next wave period will have its "sampling point" even a bit more far away from the overflow point and all the rest of it. If this really were the reason for the regular pattern in the measurement then we need to ask ourselves whether after a certain time since start the DDS accumulator matches its initial condition of zero after which the game begins new. Since it was beyond of my mathematical capabilities to compute the number of accumulations after which this condition is met again in an analytic way I wrote me a small simulation of the DDS in PASCAL making use of the fact that it supports 64 bit integers (INT64). This simulation indicated that the condition "accumulator = 0" is met every 2147483648 accumulations. Expressed in time (remember that with a 10 MHz clock every accumulation resembles a 100 ns step in time) this happens every 214.7483648 s. Well, that would explain why every 214 s or so the wave pattern matches its initial conditions but not why my measurements suggested a repetion rate of abt. 100 s. or so. It then came to my mind that perhaps not a perfect match of the initial conditions is necessary. Perhaps we need only come VERY CLOSE to the initial conditions. So I modified my simulation in such a way that accumulator values would be found which met the condition (acc>2^32-10) OR (acc<10). I.e. I made me a small "window" around the overflow point and run the simulation again. The result is to be seen in http://www.ulrich-bangert.de/Screenshot.Jpg The first column is the number of accumulations, the second column is the accumulator value and the third column ist the time in s since start. Heureka! This clearly shows that the synthesized wave (if not a complete match) is kind of "self similar" in a high degree every 107 s or so in terms of the position of her sample points. This matches my measurements very well. So we more or less need to take it for granted that only the moving of the sample points relative to the accumulator overflow point generates a (allowedly very small) phase modulation on the output of the DDS that I have documented with my measurents. For anything else other than time nuts expectations this small phase modulation may be insignificant or better than the specs demand. However for very precise timing a DDS may simply be unsuited. My hope that a combination of a DDS with a PLL would make a practical offset generator for DMTD or so have vanished in the hay. The desribed problem will not show up for power of two values of the frequency tuning word but that leaves us with very limited number of discrete frequencies that run "Ok" on the DDS. This involves ALL circuits that feature a DDS. Even the otherwise phantastic scheme suggested by Rick Karlquist involves a DDS and may fail as a good offset generator if it comes to timing aaplications. While I must confess that the effect came a bit surprisingly with the DDS I have seen similar (if not the same) effects when I tried to compare oscillators by downmixing them into the audio domain and further process them with a sound card and DSP software. One of the many things that I have tried out was to use two digital PLLs locked to the two sound card input channels. The sampled data came in chunks worth 1 s in time. Every second the program would compute how the PLL output increased in terms of phase against the sampling clock and then compute the difference between the two channels. Already there I noticed that the phase not only increased in time but also had this small periodical variations on top of it. This was true when the sampled frequency was not an integer multiple of 1 Hz. If the frequency was odd, say 100.25 Hz then the observed phase modulation on the PLL phase had a repetion rate of 4 s because every 4 s there was a match to the initial conditions. I am sure today that this is due to moving of the sample points against the sampled wave as is the case the other way round with the synthesized wave of the DDS. Best regards Ulrich Bangert www.ulrich-bangert.de Ortholzer Weg 1 27243 Gross Ippener _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.