Hi Fred,
On 05/14/2011 03:42 PM, Tijd Dingen wrote:
Magnus Danielson wrote:
There are many things you can get away with, just how much trouble you
want to verify it versus doing the proper thing is another issue.
Define "proper thing". ;-) From what I understand taking the exact Nth edge,
and then do linear regression is equivalent to taking roughly every Nth
edge and then do linear regression.
Well, you always have the corner-case where numerical precision and near
same frequency beating comes into play, so what will help and what will
reduce your precision becomes a little fuzzy to say in general terms.
That's why I be careful to say that "they are roughly the same".
If you run exact Nth edge you could do some algorithmic steps that
avoids some rounding errors. Still, N can be allowed to be fairly large
(say 1 milion). Another algorithmic benefit is that you could put your
pre-processing upfront in the FPGA.
Equivalent in the sense that the frequency estimates of the two will be
the same, to within the usual numerical uncertainties. Or to put that another
way:
The first method of doing things is not inherently better or worse than the
second
method. After all, that is the whole thing I am trying to be sure of right now.
They will not be greatly different as far as I can see. Do recall that
linear regression may need a drift component to it. I regularly see
bending curves.
Of course I can make sure that I take exactly every Nth edge. It is just that
there
are some considerable implementation advantages if that constraint does not have
to be so strict.
You can never be quite sure you see every Nth edge. You can see every
Nth edge that your digital side detected. You will need to ensure that
trigger level and signal quality is good to avoid cycle slipping on the
trigger side. It requires care on the analogue side and adjustments of
trigger levels to the signal at hand. I've seen lost pulses and double
or additional triggers too many times.
One advantage being that if this constraint can be fairly loose, then using the
ISERDES2 in the spartan-6 as part of the coarse counter is fairly simple. I did
a couple of test with that, and all looks good. The main advantage there being
that if I use the serdes, this translates into a higher input frequency without
the
need for a prescaler. Which translates into better precision.
You would indeed be able to avoid a hardware pre-scaler, but you would
need a darn good analogue front-end to make sure the input side has
slew-rate needed. Lacking slew-rate can problematic and can cause you to
loose cycles or get multiple triggers.
Also, you will get a high data-rate out of the SERDES which a FW
pre-scaler needs to sort out, but in parallel form rather than serial form.
The SERDES provides a wonderful digital front-end for high-speed
signals, but the fixed sampling rate provides little interpolation
powers, a 10 Gb/s SERDES can sample every 100 ps for you.
Hence my current (over)focus to make absolutely sure that all the results are
also
valid if one takes almost the Nth edge, but not quite right all the time...
However, you
still know which edge is which. You just don't know it early enough in the
pipeline
to use as basis for a triggering decision.
You will have to work with multiple possible trigger-locations, but it
is possible to post-process out.
I have not looked on detail performance comparison between these
algorithms lately. However, they should not be used naively together
with AVAR and friends since they attempt to do the same thing, so the
resulting filtering will become wrong and biased results will be produced.
Well, for the AVAR calculation I only use the raw time-stamps. So nothing
preprocessed. Then I should not have to worry about this sort of bias, right?
Exactly, if you use raw time-stamps and have decent quality on tau0
measures, you have avoided a lot of problems.
Cheers,
Magnus
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