How did such a trivial circuit function for a one-unit application
trigger such a large philosophical discourse? I guess I'll put my
one-cent's worth in too. If you were designing to make a
mission-critical item, or millions of units, then every part and
every penny would count, so the finesse requirement would be high,
and the details critical. But this is not the case here.
All you need is an NPN open collector - a simple Q circuit - or the
output of an OC TTL or OD CMOS gate to eliminate the powered v.
unpowered states issue. Let the gate or Q circuit be driven from the
Rb source +5 V and 10 MHz signal, and let the collector/drain output
be pulled up to the PIC supply. If there is concern that for some
reason the gate open-device output may not work right when the gate
is unpowered, then just build it and see, or just use a transistor circuit.
Ed
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