OK for the PSOC example. At the moment I can try on a Spartan3 because I already have a board with the OCXO. The Spartan3 has the so called DCM, a digital clock generator that can multiply an input clock using its DDL digital delay line.
On Thu, Feb 2, 2012 at 8:13 PM, Hal Murray <hmur...@megapathdsl.net> wrote: > > t...@leapsecond.com said: > > I'm not sure how well a multi-level leap year algorithm relates > Breseham's > > algorithm. I tracked down his 1965 plotter article. There might be common > > ground there. > > It's the same math as a DDS. > > If Breseham would land exactly on a grid point after N steps, a DDS will > have no long term drift. That means the slope of the Breseham line is N/M > where both N and M are integers. For the intermediate steps, both Breseham > and DDS come as close as possible: 1/2 grid spacing vs 1/2 clock period. > > We usually think of DDS as requiring M to be a power of 2 but you don't > have > to do it that way. One obvious example is to make M a power of 10 by doing > decimal adds rather than binary. That should work well with a FPGA but I > haven't done it yet. If you start with 10 MHz, that will give you perfect > hits on integer audio frequencies. > > > > > > -- > These are my opinions, not necessarily my employer's. I hate spam. > > > > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
