Thanks for the replies! Very informative. Dan
Sent from my iPhone > On May 31, 2015, at 6:23 PM, Attila Kinali <att...@kinali.ch> wrote: > > On Sun, 31 May 2015 14:06:26 -0400 > Dan Watson <watsondani...@gmail.com> wrote: > >> Has anyone used or experimented with the 74LVC series of ICs? I have found >> them quite useful in projects. Supply voltage of 2-5V, and two inverters or >> a single gate or flip flip in a SOT package. They make for much cleaner >> layouts than large DIPs. > > Yes, quite a few of those. After CPLDs and FPGAs replaced all of the > more complex 74xxx's, people realized that most projects do not need > 4 NAND gates at one spot, but rather single ones here and there > (a schmitt-trigger for signal conditioning, an AND gate to couple two > enable lines,...). > >> I'm wondering if they are acceptable replacements for 74HC, AC, etc in >> timing circuits. > > I have never used any of the LVC in a timing circuit, but i would > guess they are not worse than the AC. Also they have the advantage of > having single gates per package, which helps minimizing cross coupling > between different signal paths. > > BTW: [1] may contain some interesting data for you. Especially as it > compares different manufacturers too. > > Looking at [2], the ALVC family would probably be also worth a look. > > Attila Kinali > > > [1] "Low Voltage Logic Designers Guide", Ti, 1996 > http://www.ti.com/lit/ml/scba010/scba010.pdf > > [2] "Logic Guide", Ti, 2014 > http://www.ti.com/lit/sg/sdyu001aa/sdyu001aa.pdf > > -- > < _av500_> phd is easy > < _av500_> getting dsl is hard > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.