It is interesting that the HP8662A multiplies 10 MHz to 640 MHz, in steps of 2X. But there is a crystal filter at 80 MHz to clean up the wideband noise of the 10811. In the 11729, they filter the 640 MHz from the 8662 with a SAW filter, again to eliminate multiplied up wideband noise. It's going to be tough to replace a 100 MHz OCXO by multiplying. You have the additional problem that 100 MHz is not a power of 2 multiplication. I think you're stuck waiting for your OCXO's.
Rick Karlquist N6RK On 1/21/2016 6:43 AM, jimlux wrote:
My tiny 100 MHz low noise OCXOs are unexpectedly delayed at the mfr, and I'm looking at alternative schemes. One is to get 10 or 20 MHz OCXOs (typically in stock) and multiply them up. I've got the Wenzel ap notes on 2diode and using HCMOS (and I've used the packaged Wenzel multipliers), and I think I have some spare board real estate on another board. The 2diode multiplier describes using 1n5711 or 1n914, but I was wondering if anyone has run this sort of multiplier up to 100 MHz? What sort of symmetry does the resulting waveform have (yeah, it's basically a filtered sinewave, because you're picking a harmonic, but I've been surprised before)? I'm driving an FPGA and a couple of ADCs. The ADCs have differential input that is 10kohms with 9pF in parallel offset from ground in the usual way (we're using a transformer and appropriate bias resistors). Not a 50 ohm load, in any case. And it wants a clock that is high for about 47.5% to 52.5% in one mode and much wider (30%-70% in another).. I need to check. The FPGA is less critical noise-wise, and has a AD8138 buffer in any case, which can fix a variety of evils. _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
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