Am 25.02.2016 um 22:23 schrieb Magnus Danielson:
Interesting. I would consider the PICDIV such as that of TADD-2, which
has the benefit of producing a range of frequencies, so that a
suitable can be selected as matching the needs. I've found it very
useful property of the TADD-2, where I have my TADD-2s wired up to
output one of each. I also wired them to output the buffered variant
of the clock, which gives better measures compared to running the sine
straight into the counters.
I have never used PICs and given their life cycle it's a bad time to
jump on the train.
Not now when I'm just converting everything to ARM. OTOH I have used
Xilinx since they exist
and this board is more or less a cleanup of things that are already there.
This here is all it takes for 10 and 100 MHz oscillators:
----------------------------------------------------------------------------------
-- Company: Hoffmann RF & DSP
-- Create Date: 09:09:37 08/08/2012
-- Module Name: pps1_generator - Behavioral
-- Target Devices: X2c64A-5VQ44
-- Additional Comments: Free firmware under BSD license
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.all;
entity pps1_generator is
Port(
clk : in STD_LOGIC;
RunAt100MHz : in STD_LOGIC;
pps1_out : out STD_LOGIC;
);
end pps1_generator;
architecture Behavioral of pps1_generator is
signal tctr : integer range 0 to 99999999;
signal pw_ctr : integer range 0 to 199999;
signal cycle_done : boolean;
signal pw_done : boolean;
function bool2sl(b : boolean) return std_logic is
begin
if b then return '1'; else return '0'; end if;
end function bool2sl;
begin
u_div : process(clk) is
begin
if rising_edge(clk) then
cycle_done <= (tctr = 0); -- pipeline the comparator
if cycle_done
then
if RunAt100MHz = '1' then
tctr <= 100000000 - 2; -- divide by 100 Meg
else
tctr <= 10000000 - 2; -- divide by 10 Meg
end if;
else
tctr <= tctr - 1;
end if;
end if; -- rising_edge()
end process u_div;
-- produce the standard 20 usec pulsewidth
u_pulsewidth : process(clk) is
begin
if rising_edge(clk) then
if cycle_done then
if RunAt100MHz = '1' then
pw_ctr <= 19999;
else
pw_ctr <= 1999;
end if;
elsif pw_ctr /= 0 then
pw_ctr <= pw_ctr - 1;
end if;
pps1_out <= bool2sl(pw_ctr /= 0);
end if; -- rising_edge()
end process u_pulsewidth;
end Behavioral;
-------------------------------------------------------------------------------------------------------------
I have also a version that fits into 2 chips, runs at Osc = 200 MHz and
produces a fixed 1/10/100/1000pps and another pps that can be shifted
against the first one in 5nsec steps over > 1 second.
It also provides control for a Micrel ECL chip that does the ps
interpolation
between the 5 ns steps.
It has a shift register interface that is controlled by a Beagle Bone Black
under Debian Linux, so network access is free.
Ideal for testing ranging systems and TICs / TDCs, but it still needs
some software.
The power-supply input didn't look all that clear. It would be handy
if a single input could be used.
It can run on -5...-8V (for the opamps) and +12V for Morion and MTI;
the HP10811 needs 20V or so
for its heater. In this case the 12V is made from the 20V. I do not want
a switcher there.
I could probably have use for several of these boards.
Me too. I have recently decremented the number of available Lucent REF 0
plug-ins quite substantially.
(BTW: The Lucent REF 1 units with GPS are completely sold out for good,
I have asked.)
The idea is to lock 8 or 16 5 MHz MTI-260s to something long-time
stable and see
how far I get wrt phase noise when I combine the outputs.
Seems to be more promising than that promiscuous coupled resonator stuff
that was promoted recently. It is even somewhat tunable.
I like throwing repetitive hardware at problems when I get sth. in return.
Like my 220pv/sqrtHz preamp with 20 low noise opamps averaged.
regards, Gerhard, DK4XP
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