Hej igen Anders,
On 04/16/2016 08:29 AM, Anders Wallin wrote:
hi all, I wrote down some notes on a recent PICDIV build and measurements:
http://www.anderswallin.net/2016/04/picdiv-frequency-divider/
If/when I make v2 of this board:
- any suggestions for boosting the output amplitude of both 1PPS and 10MHz
CMOS? Something that drives 3.3Vpp into 50R with ~few ns rise time?
No or very little output resistance from a number of CMOS drivers get
you close. Output impedance will be far from 50 Ohm thought, which may
or may not be an issue. Otherwise, you need higher voltage. Often "TTL
level" meaning 2,5 Vp is being used.
- any obvious mistakes that cause the phase-noise observed? Mostly I think
50/100Hz and harmonics would be nice to suppress..
OK. Bond the shields to the front-plate properly. Preferably bond your
10 MHz source and your measurement kit with a high conductance path, and
also any power-supply. In general, make the PCB board shunted for ground
potential differences, as those will easily be amplified as they go
through the board. Tie things together away from the board and whatever
current needs to go via the module, make sure it finds a better path
than through the PCB ground traces. There is also layout tricks to make
all the internal circuit only tie to the outside ground currents but
tying to them voltage wise by using a star ground from the ground point.
Cheers,
Magnus
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