On Tue, 21 Mar 2017 21:45:24 -0400
Bob Camp <kb...@n1k.org> wrote:
> 1) You need a way to digitize the phase input with adequate resolution. If
> you have a 1 second period and want 1 ns, you need a way to digitize at
> a 1:1,000,000,000 sort of level. That’s in the 30 bit range so a simple
> ADC isn’t going to do it alone.
That depends on how the phase difference is measured. If the whole
measurement period needs to be encoded, then yes, the number of
bits needed will make it difficult. But usually the input frequency
range is limited, which allows to measure and encode just the difference
between expected and actual arrival time of the pulse/edge. The integrated
version of these PLLs (the ADPLL - all digitall PLL), if they have a
real TDC, have only a resolution in the order of 7-8 bits (IIRC I've seen
down to 4 bits). And then there is the class of those Bang-Bang PLL,
which only encode one bit: early/late. Eventhough they are relatively
crude and rely on the loopfilter to smooth things out, they perform
quite well.
Attila Kinali
--
It is upon moral qualities that a society is ultimately founded. All
the prosperity and technological sophistication in the world is of no
use without that foundation.
-- Miss Matheson, The Diamond Age, Neil Stephenson
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