Direct multiplication to 9192 MHz isn't used
by any manufacturer of any atomic clock that I
know of, due to its well known disadvantages.
I can state for a fact that it was summarily
rejected by the designers of the 5060/5061
(Cutler, et al).  In the 5071, I (being the
RF designer) also summarily rejected it.
The architecture that is instead used is indeed
complex and expensive as you say.  It is
also ACCURATE.

Rick

On 6/1/2017 7:04 PM, Donald E. Pauly wrote:
https://www.febo.com/pipermail/time-nuts/2017-May/105566.html

The lock system on the HP5071 is complex and expensive.  My plan to
improve the HP5061B is to to use a pair of third overtone crystals
running at 91.9 mc and 100 mc.  I have come up with the magic numbers
to lock them together.  This eliminates all multipliers with the
exception of the A4 board. The 12.61 mc synthesizer input presently
wastes half the microwave power produced by the 90 mc input in the
unused lower sideband. Therefore only half the 91.9 mc drive is
required.

Eight bit ECL dividers in one package are available to perform the
necessary lock.  When multiplied by 100 to the cesium resonance line,
the 91.9 mc frequency is a few cycles high so that C field currents
are reasonable. With crystal cuts for zero temperature coefficient at
25°C, it is possible to get along without an oven.  Room temperature
performance at 25°C±5°C is ±15·10^-9.  Oscillator warm up time would
be measured in seconds.

Square wave modulation of variable frequency and amplitude shows
promise for reducing the noise effects of the beam tube.  You can
smoothly change the lock time constant, deviation and frequency.  This
would avoid the big disturbance of the HP5061B when you switch from
OPR to LTC. (OPR=operate with 1 second time constant, LTC=operate with
100 second time constant)

πθ°μΩω±√·Γλ
WB0KV
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