The simplest solution to the divider and clock shaper is perhaps to use an LTC6954. The LTC6954 offers PECL/CMOS and LVDS outputs together with a low jitter (sub ps) programmable (SPI) divider (1-63).A couple of coax relays like those from Dow Key microwave together with some hardline and a couple of splitters could be used to implement the signal switching.
> > On 09 July 2017 at 09:53 Hal Murray <hmur...@megapathdsl.net> wrote: > > t...@leapsecond.com said: > > > > > > The PIC dividers are good to a couple ps. I suspect the larger > > issue is the > > PCB and wiring design. > > > > > > What does "good" mean? > > I'd expect the variations due to power or temperature would be easy to > measure. > > Delay through classic CMOS is linear with absolute temperature and inverse > linear with supply voltage. > > The classic way to get time-nuts level noise on FPGA outputs is to wiggle > a > nearby pin. That shouldn't be a problem with a dedicated PIC but would > probably show up if you are generating multiple frequencies. > > -- > These are my opinions. I hate spam. > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
