On Mon, January 22, 2018 6:42 am, Hal Murray wrote: > Does anybody know what's in the DSPLL box?
Basically a PLL implemented with some kind of DDS for the VCO and DSP for the loop filter. https://www.silabs.com/documents/public/white-papers/Silicon-Labs-Next-Generation-DSPLL-Technology-White-Paper---June-2015.pdf The DSP loop filter gives a really wide range of loop bandwidth, down to fractional Hz for some parts. Using a DDS for the VCO gives a lot of flexibility in output frequency selection, but means that there can be problems with spurs. Part of the SiLabs secret sauce is supposed to reduce spurs compared to a simpler NCO implementation, but I don't think you can eliminate spurs entirely with any kind of DDS based design. -- Chris Caudle _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
