On 23-Jul-20 4:35 AM, Detlef Schuecker via time-nuts wrote: > Hi, > >> principles. The STM32L4 series which I often use has a pretty decent >> ADC: fast (5 MSPS), with about 11 good bits in differential mode, and >> "proper" hardware downsampling (called the DFSDM in the manual). If the > Yes, the STM32 series also have built-in OPAmps, so one could hook up a > loop or a ferrite directly to the uC without too much external components. > Sampling at 160ks/s should suffice to get the phase and DCF77 is in reach > as well. At this rate you have ~500-1000 processor ticks per sample which > should be enough to do real time demodulation.
Are there any examples (schematics) out there for the front-end electronics? I haven't found much by googling except the KD2BD design which is more involved than I would like. The integrated designs used in "atomic" clocks seem very simple, but I am unsure how to duplicate them. I would like to use a crystal filer, but I'm at a bit of a loss to start. For example, would one choose series or parallel resonance? I believe the impedance of these tuning forks is quite high at series resonance---tens of kohms. I didn't make much progress the last time I tried doodling op-amp circuits to use one. My general impression of this list is that a lot of folks are pretty comfortable with analog and discrete digital design, but find DSP and algorithms "hard." I'm exactly the opposite so maybe I am in the right place ;) Mark _______________________________________________ time-nuts mailing list -- time-nuts@lists.febo.com To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.