Would an « AVRDIV » have similar performances, with similar 8 pins processors 
such as the Attiny13a ?
Advantage : it features one cycle instructions, so possible to divide by many 
other factors (including odd numbers)
GC


> Le 8 janv. 2022 à 04:05, Tom Van Baak <t...@leapsecond.com> a écrit :
> 
> All -- The 2012 test results for the T2-mini, which contains a PIC divider 
> chip, is here:
> 
> http://leapsecond.com/pic/jitter/
> 
> It's about 1 ps, or sqrt(2) less because it was comparing two T2-mini against 
> each other with a common reference. Also note that this measurement is the 
> sum total of the Wenzel sine-to-square circuit onboard the T2mini, the PIC 
> divider chip itself, and the 74AC04 buffer chip.
> 
> I also included some plots of a baseline test to show that the Wenzel ULN 
> (Ultra Low Noise) reference and the Miles' TimePod analyzer are not the 
> limiting factor in the test.
> 
> Hal -- The pD17 PIC divider used in the T2-mini has a single output. See 
> T2-mini schematic in the above URL. The PIC code is here:
> 
> http://leapsecond.com/pic/src/pd17.asm
> 
> Bruce -- I agree with your comments. Thanks for posting that.
> 
> Attila -- I have not measured the voltco. Note the T2-mini has an onboard 
> regulator. I also have not measured tempco. Although the jitter is about 1 ps 
> the wander over that 10 minute run is about ±6 ps (2.4 ps rms). Look at the 
> phase plot in the test results. This is also why the ADEV plot has that 
> characteristic plateau from tau 2 to 20 s.
> 
> IIRC, the test was done causally on a floor in open air so walking, 
> breathing, drinking coffee, and checking email are known to wiggle things at 
> the picosecond level. Someone could look into this more if they wish. I would 
> be interested to know how much of the wandering is due to the voltage 
> regulator vs. Wenzel transistor circuit vs. the PIC vs. the 74AC chip.
> 
> /tvb
> 
> 
> On 1/7/2022 12:40 PM, Hal Murray wrote:
>>> The two biggest outside influences on the PICDIV are supply voltage and 
>>> temperature.
>> Another interesting influence is the number of outputs that are switching and
>> the load on them.  In particular, if you have several outputs running at
>> different frequencies, the clock-out delay should be slightly longer when 2
>> outputs switch when compared to when only one is switching.
>> 
>> Has anybody measured that on a PIC? (or similar chip)
>> 
>> I think one of tvb's picDEVs has several outputs.
>> 
> 
> On 1/7/2022 5:00 PM, Bruce Griffiths wrote:
>> That entire thread is full of misinformation and should be ignored unless 
>> one understands the difference between random and data dependent jitter.
>> 
>> For a well designed divider with a single output frequency only the random 
>> jitter spec is significant.
>> 
>> One doesn't need a bunch of expensive LeCroy gear to measure RJ of such 
>> dividers as its PN manifestations are readily apparent and measurable.
>> 
>> Using one of the supposedly super low jitter flipflops isn't a panacea. In 
>> practice unless an appropriately designed ZCD is used the wideband input 
>> noise of the very fast FF will dominate and produce much more jitter than 
>> expected due to the relatively slow slew rate of the outputs of most 10MHz 
>> sources.
>> 
>> Bruce
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