On 4/26/22 17:37, Graham / KE9H wrote:
For John A., or anyone comfortable answering.
When using the TICC in the default time stamping mode, is there any minimum
required separation in time required between the channel A and channel B
input events?
Is the TICC capable of handling two events within a few pico seconds of
each other?
Hi Graham --
The two TICC channels are completely independent and there's no minimum
or maximum offset between them -- you can even have 1 PPS on chA and 10
PPS on chB, or whatever.
However... if the two inputs are quite close together, there's no
assurance that the data output will reflect the order of the inputs. In
other words, even if chA precedes chB by 10 ns, the serial output might
be in chB, chA order.
There are a couple of reasons for that, the main one being that the TDCs
are clocked at 10 MHz (their ps resolution comes from a much higher
speed internal ring oscillator). If a timestamp for each channel is
processed within the same 100 ns tick, both chips will raise their
measurement complete interrupt at the next tick, and there's no way
ahead of time to know which channel has the earlier timestamp.
The data for each channel will always be correct, but there's no
guarantee that the every line of output will have a later timestamp
output than the one immediately preceding (from the other channel).
John
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