As an additional reference, check: http://focus.ti.com/lit/an/slaa074/slaa074.pdf (Controlling the DCO Frequency of the MSP430x11x) which provides a calibration routine that uses the higher stability crystal to compensate the DCO frequency error.
It is well known that the two dominant aspects that affect the freq of a delay line ring oscillator are temperature and voltage. The neat thing about the MSP430 is that it has a temperature sensor and a voltage sensor built in. One would believe that using a combination of the stable crystal and the two sensors, one could derive a stable clock from the DCO at all temperatures and voltages (re-run calibration only when the sensor values change). Zainul. On Sat, Oct 18, 2008 at 3:32 PM, Zainul M Charbiwala <[EMAIL PROTECTED]> wrote: > Hi, > > I would think so. If you use just the DCO, without any calibration, > the error will be very high. > From datasheet numbers for MSP430F1611: > > Temperature sensitivity is about 0.38% / degC (from a nominal at 25 degC) at > 3V. > Voltage sensitivity is about 5% / V. > > Since the frequency vs temperature and frequency vs voltage > characteristics are highly non-linear, it is hard to come up with a > good relationship that will capture both effects together, but you get > an idea of how 'bad' a DCO is (I must emphasize that this is without > calibration). > > If you calibrate a DCO well enough, it can give you a pretty stable clock. > To my understanding TinyOS does perform calibration at boot up. See > http://mail.millennium.berkeley.edu/pipermail/tinyos-help/2007-September/027998.html > > > Zainul. > > > On Sat, Oct 18, 2008 at 2:27 PM, Somnath Mitra <[EMAIL PROTECTED]> wrote: >> Hello Zainul, >> >> Thanks for your reply. You said that the freq error (worst case) for the 32 >> Khz crystal is 40 ppm. What if we use the internal DCO ? will our internal >> freq error go up ? >> >> Thanks, >> >> Somnath >> >> On Sat, Oct 18, 2008 at 3:35 PM, Zainul M Charbiwala <[EMAIL PROTECTED]> >> wrote: >>> >>> Hi Somnath, >>> >>> The main clock on the Telos motes runs on an internal DCO which has a >>> lot of frequency error (could be on the order of 10%), unless the >>> error is corrected through periodic recalibration with the crystal. >>> >>> I believe the timers are run off the 32KHz crystal in TinyOS, which >>> would lead to a worst case of 40ppm freq error. >>> >>> The clock drift is essentially (in sec), drift = >>> (time_since_last_sync)*(freq_error_in_ppm)/1e6. >>> >>> This means that if you don't resync periodically, your clock drift >>> could be unbounded. >>> Hope this answers your question. >>> >>> Zainul. >>> >>> On Sat, Oct 18, 2008 at 1:17 PM, Somnath Mitra <[EMAIL PROTECTED]> wrote: >>> > Hello , >>> > >>> > People who have worked on time synchronization, can anyone please tell >>> > me >>> > that - >>> > >>> > Can we say that there is a maximum upper bound on the amount of drift of >>> > the >>> > clocks of Telos like platforms ? >>> > >>> > Thanks, >>> > >>> > Somnath Mitra >>> > >>> > _______________________________________________ >>> > Tinyos-help mailing list >>> > Tinyos-help@millennium.berkeley.edu >>> > https://www.millennium.berkeley.edu/cgi-bin/mailman/listinfo/tinyos-help >>> > >> >> > _______________________________________________ Tinyos-help mailing list Tinyos-help@millennium.berkeley.edu https://www.millennium.berkeley.edu/cgi-bin/mailman/listinfo/tinyos-help
