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VSTTE 2025
17th International Conference on Verified Software: Theories, Tools, and
Experiments
October 06-07, 2025, Menlo Park, California, USA
Co-located with Formal Methods in Computer-Aided Design 2025 (FMCAD
2025<https://urldefense.com/v3/__https://fmcad.org/FMCAD25/__;!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEYyKhFe8s$
>)
Key Information
Conference Website:
https://urldefense.com/v3/__https://systemf.epfl.ch/etc/vstte2025/__;!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEYvYTRqMM$
Paper submission Deadline: July 18th AoE
This year, VSTTE accepts both (short and long) regular papers to be included in
post-conference proceedings and work-in-progress (presentation only) papers.
Overview
The goal of the VSTTE conference series is to advance the state of the art in
the science and technology of software verification, through the interaction of
theory development, tool evolution, and experimental validation.
The Verified Software Initiative (VSI), spearheaded by Tony Hoare and Jayadev
Misra, is an ambitious research program for making large-scale verified
software a practical reality. The International Conference on Verified
Software: Theories, Tools and Experiments (VSTTE) is the main forum for
advancing the initiative. VSTTE brings together experts spanning the spectrum
of software verification in order to foster international collaboration on the
critical research challenges. The theoretical work includes semantic
foundations and logics for specification and verification, and verification
algorithms and methodologies. The tools cover specification and annotation
languages, program analyzers, model checkers, interactive verifiers and proof
checkers, automated theorem provers and SAT/SMT solvers, and integrated
verification environments. The experimental work drives the research agenda for
theory and tools by taking on significant specification/verification exercises
covering hardware, operating systems, compilers, computer security, parallel
computing, and cyber-physical systems.
Call for papers and work-in-progress presentations
VSTTE 2025 welcomes submissions describing significant advances in the
production of verified software, i.e. software that has been proved to meet its
functional specifications. Submissions of theoretical, practical, and
experimental contributions are equally encouraged, including those that focus
on specific problems or problem domains. We are especially interested in
submissions describing large-scale verification efforts that involve
collaboration, theory unification, tool integration, and formalized domain
knowledge. We also welcome papers describing novel experiments and case studies
evaluating verification techniques and technologies.
In addition to regular papers, we welcome submissions on in-progress verified
software projects to a “work-in-progress (presentation-only)” track.
Work-in-progress contributions will not appear in the post-proceedings of the
conference. Submissions describing work of interest to the software
verification community, but that could not be accepted for publication in the
conference proceedings, may be invited to the “work-in-progress
(presentation-only)” track, on a case-by-case basis.
Topics of interest for this conference include, but are not limited to,
requirements modeling, specification languages,
specification/verification/certification case studies, formal calculi, software
design methods, automatic code generation, refinement methodologies,
compositional analysis, verification tools (e.g., static analysis, dynamic
analysis, model checking, theorem proving, satisfiability), tool integration,
benchmarks, challenge problems, and integrated verification environments.
Submissions
VSTTE 2025 accepts both long (limited to 16 pages, excluding references) and
short (limited to 10 pages, excluding references) paper submissions. Short
submissions also cover “verification pearls” describing an elegant proof or
proof technique. Submitted research papers and system descriptions must be
original and not submitted for publication elsewhere.
Papers may be submitted via EasyChair at the VSTTE 2025 conference submission
page<https://urldefense.com/v3/__https://easychair.org/conferences/?conf=vstte25__;!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEYaDzs5HA$
>. The use of LaTeX and the Springer LNCS class
files<https://urldefense.com/v3/__https://www.springer.com/gp/computer-science/lncs/conference-proceedings-guidelines__;!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEYwADidiQ$
> is strongly encouraged. Submissions that are not in the proper format or are
too long will not be considered.
Accepted regular-track papers will be included in the post-conference
proceedings of VSTTE 2025, which will be published as a LNCS volume by
Springer-Verlag. Authors of those papers will have to transfer copyright of
their contribution to Springer-Verlag.
Important Dates
*
Abstract submission: July 14th AoE
*
Paper submission: July 18th AoE
*
Notification of acceptance: Aug 31th (AoE)
*
Final pre-conference paper submission: September 26th (AoE)
*
Conference: October 6th-7th
*
Camera-ready for papers included in post-conference proceedings: TBA
Invited speakers
*
Caroline
Trippel<https://urldefense.com/v3/__https://cs.stanford.edu/people/trippel/__;!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEYIbGMuHU$
> (Stanford University)
*
Grant
Passmore<https://urldefense.com/v3/__https://www.imandra.ai/about__;!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEYh9_Fuqk$
> (Imandra)
Invited tutorial speakers
*
Pierre-Yves
Strub<https://urldefense.com/v3/__https://www.strub.nu/__;!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEYdNbl07c$
> (PQShield)
Chairs
Steering Committee
*
Supratik
Chakraborty<https://urldefense.com/v3/__https://www.cse.iitb.ac.in/*supratik/__;fg!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEY5mdRoZQ$
> (IIT Bombay, India)
*
Natarajan
Shankar<https://urldefense.com/v3/__https://www.csl.sri.com/*shankar/__;fg!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEYhhFhvjY$
> (SRI International)
Program Chairs
*
Clément
Pit-Claudel<https://urldefense.com/v3/__https://pit-claudel.fr/clement/__;!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEY_2eJyKE$
> (EPFL)
*
Katherine
Kosaian<https://urldefense.com/v3/__https://sites.google.com/view/katherinekosaian__;!!IBzWLUs!SQ8Re3d5DwT3SdMZPPx9s5eH-3RVymGdZtHFBZimTZ847mPhsXonCab7MWkM56TCf733N1C-bDG6Ot7F022BIg_ZUrBvRG2nHSEY9ctzkJQ$
> (University of Iowa)
