Considering for u-boot-arm, unless another ARM custodian wants it? Regards
Peter > -----Original Message----- > From: Pieter Voorthuijsen [mailto:[EMAIL PROTECTED] > Sent: 20 March 2008 11:29 > To: [email protected] > Cc: Peter Pearse > Subject: [PATCH 2/2] DM644x: This adds support for the > Prodrive PMDRA board, based on a DM6441 > > Hello, > > This patch adds support for the new Prodrive PMDR-A board. It > is based on the DaVinci DM6441 processor, has 256M DDR2, 8M > NOR and 256M of NAND. > (This requires the previous patch that removes board specific > code from > /cpu/arm926ejs/davinci) > > Best regards, > Pieter > > > Signed-off-by: Pieter Voorthuijsen <[EMAIL PROTECTED]> > --- > Makefile | 3 + > board/prodrive/pmdra/Makefile | 52 ++++++++++ > board/prodrive/pmdra/board_init.S | 34 +++++++ > board/prodrive/pmdra/config.mk | 39 ++++++++ > board/prodrive/pmdra/pmdra.c | 192 > +++++++++++++++++++++++++++++++++++++ > board/prodrive/pmdra/u-boot.lds | 52 ++++++++++ > include/configs/pmdra.h | 184 > +++++++++++++++++++++++++++++++++++ > 7 files changed, 556 insertions(+), 0 deletions(-) create > mode 100644 board/prodrive/pmdra/Makefile create mode 100644 > board/prodrive/pmdra/board_init.S create mode 100644 > board/prodrive/pmdra/config.mk create mode 100644 > board/prodrive/pmdra/pmdra.c create mode 100644 > board/prodrive/pmdra/u-boot.lds create mode 100644 > include/configs/pmdra.h > > diff --git a/Makefile b/Makefile > index 4fde699..77f3d24 100644 > --- a/Makefile > +++ b/Makefile > @@ -2375,6 +2375,9 @@ davinci_schmoogie_config : unconfig > davinci_sonata_config : unconfig > @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci > > +pmdra_config : unconfig > + @$(MKCONFIG) $(@:_config=) arm arm926ejs pmdra prodrive davinci > + > omap1610inn_config \ > omap1610inn_cs0boot_config \ > omap1610inn_cs3boot_config \ > diff --git a/board/prodrive/pmdra/Makefile > b/board/prodrive/pmdra/Makefile new file mode 100644 index > 0000000..918c7b0 > --- /dev/null > +++ b/board/prodrive/pmdra/Makefile > @@ -0,0 +1,52 @@ > +# > +# (C) Copyright 2000, 2001, 2002 > +# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED] > +# > +# Copyright (C) 2007 Sergey Kubushyn <[EMAIL PROTECTED]> # # See file > +CREDITS for list of people who contributed to this # project. > +# > +# This program is free software; you can redistribute it and/or # > +modify it under the terms of the GNU General Public License as # > +published by the Free Software Foundation; either version 2 of # the > +License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be > useful, # but > +WITHOUT ANY WARRANTY; without even the implied warranty of # > +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU > +General Public License for more details. > +# > +# You should have received a copy of the GNU General Public > License # > +along with this program; if not, write to the Free Software # > +Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA > 02111-1307 > +USA # > + > +include $(TOPDIR)/config.mk > + > +LIB = $(obj)lib$(BOARD).a > + > +COBJS := pmdra.o > +SOBJS := board_init.o > + > +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) > +OBJS := $(addprefix $(obj),$(COBJS)) > +SOBJS := $(addprefix $(obj),$(SOBJS)) > + > +$(LIB): $(obj).depend $(OBJS) $(SOBJS) > + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) > + > +clean: > + rm -f $(SOBJS) $(OBJS) > + > +distclean: clean > + rm -f $(LIB) core *.bak *~ .depend > + > +############################################################# > ########## > ## > +# This is for $(obj).depend target > +include $(SRCTREE)/rules.mk > + > +sinclude $(obj).depend > + > +############################################################# > ########## > ## > diff --git a/board/prodrive/pmdra/board_init.S > b/board/prodrive/pmdra/board_init.S > new file mode 100644 > index 0000000..6cc2e86 > --- /dev/null > +++ b/board/prodrive/pmdra/board_init.S > @@ -0,0 +1,34 @@ > +/* > + * Copyright (C) 2008 Prodrive B.V. > + * > + * Board-specific low level initialization code. Called at > the very end > + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is > no > + * initialization required. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +/* This code sets up the timing params for EMIF CE2 and CE3 which > + * connect to NOR and NAND flash > + */ > + > +#include <config.h> > + > +.globl dv_board_init > +dv_board_init: > + > + mov pc, lr > + > diff --git a/board/prodrive/pmdra/config.mk > b/board/prodrive/pmdra/config.mk new file mode 100644 index > 0000000..aa89d0e > --- /dev/null > +++ b/board/prodrive/pmdra/config.mk > @@ -0,0 +1,39 @@ > +# > +# (C) Copyright 2002 > +# Gary Jennejohn, DENX Software Engineering, <[EMAIL PROTECTED]> # David > +Mueller, ELSOFT AG, <[EMAIL PROTECTED]> # # (C) Copyright 2003 # > +Texas Instruments, <www.ti.com> # Swaminathan > <[EMAIL PROTECTED]> # # > +Davinci EVM board (ARM925EJS) cpu # see http://www.ti.com/ for more > +information on Texas Instruments # # Davinci EVM has 1 bank > of 256 MB > +DDR RAM # Physical Address: > +# 8000'0000 to 9000'0000 > +# > +# Copyright (C) 2007 Sergey Kubushyn <[EMAIL PROTECTED]> # # Visioneering > +Corp. Sonata board (ARM926EJS) cpu # # Sonata board has 1 > bank of 128 > +MB DDR RAM # Physical Address: > +# 8000'0000 to 8800'0000 > +# > +# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu # # > Schmoogie board > +has 1 bank of 128 MB DDR RAM # Physical Address: > +# 8000'0000 to 8800'0000 > +# > +# Linux-Kernel is expected to be at 8000'8000, entry > 8000'8000 # (mem > +base + reserved) # # we load ourself to 8108 '0000 # # > + > +#Provide at least 16MB spacing between us and the Linux Kernel image > +TEXT_BASE = 0x81080000 > diff --git a/board/prodrive/pmdra/pmdra.c > b/board/prodrive/pmdra/pmdra.c new file mode 100644 index > 0000000..348ba47 > --- /dev/null > +++ b/board/prodrive/pmdra/pmdra.c > @@ -0,0 +1,192 @@ > +/* > + * Copyright (C) 2007 Sergey Kubushyn <[EMAIL PROTECTED]> > + * > + * Parts are shamelessly stolen from various TI sources, original > copyright > + * follows: > + * ----------------------------------------------------------------- > + * > + * Copyright (C) 2004 Texas Instruments. > + * > + * > -------------------------------------------------------------- > ---------- > ---- > + * This program is free software; you can redistribute it > and/or modify > + * it under the terms of the GNU General Public License as > published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. > + * > -------------------------------------------------------------- > ---------- > ---- > + */ > + > +#include <common.h> > +#include <i2c.h> > +#include <asm/arch/hardware.h> > +#include <asm/arch/emac_defs.h> > + > +#define MACH_TYPE_DAVINCI_EVM 901 > + > +DECLARE_GLOBAL_DATA_PTR; > + > +extern void i2c_init(int speed, int slaveaddr); > +extern void timer_init(void); > +extern int eth_hw_init(void); > +extern phy_t phy; > + > + > +/* Works on Always On power domain only (no PD argument) */ void > +lpsc_on(unsigned int id) { > + dv_reg_p mdstat, mdctl; > + > + if (id >= DAVINCI_LPSC_GEM) > + return; /* Don't work on DSP Power > Domain */ > + > + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); > + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); > + > + while (REG(PSC_PTSTAT) & 0x01) {;} > + > + if ((*mdstat & 0x1f) == 0x03) > + return; /* Already on and enabled */ > + > + *mdctl |= 0x03; > + > + /* Special treatment for some modules as for sprue14 p.7.4.2 */ > + if ( (id == DAVINCI_LPSC_VPSSSLV) || > + (id == DAVINCI_LPSC_EMAC) || > + (id == DAVINCI_LPSC_EMAC_WRAPPER) || > + (id == DAVINCI_LPSC_MDIO) || > + (id == DAVINCI_LPSC_USB) || > + (id == DAVINCI_LPSC_ATA) || > + (id == DAVINCI_LPSC_VLYNQ) || > + (id == DAVINCI_LPSC_UHPI) || > + (id == DAVINCI_LPSC_DDR_EMIF) || > + (id == DAVINCI_LPSC_AEMIF) || > + (id == DAVINCI_LPSC_MMC_SD) || > + (id == DAVINCI_LPSC_MEMSTICK) || > + (id == DAVINCI_LPSC_McBSP) || > + (id == DAVINCI_LPSC_GPIO) > + ) > + *mdctl |= 0x200; > + > + REG(PSC_PTCMD) = 0x01; > + > + while (REG(PSC_PTSTAT) & 0x03) {;} > + while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an > overkill... */ > +} > + > +void dsp_on(void) > +{ > + int i; > + > + if (REG(PSC_PDSTAT1) & 0x1f) > + return; /* Already on */ > + > + REG(PSC_GBLCTL) |= 0x01; > + REG(PSC_PDCTL1) |= 0x01; > + REG(PSC_PDCTL1) &= ~0x100; > + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; > + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; > + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; > + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; > + REG(PSC_PTCMD) = 0x02; > + > + for (i = 0; i < 100; i++) { > + if (REG(PSC_EPCPR) & 0x02) > + break; > + } > + > + REG(PSC_CHP_SHRTSW) = 0x01; > + REG(PSC_PDCTL1) |= 0x100; > + REG(PSC_EPCCR) = 0x02; > + > + for (i = 0; i < 100; i++) { > + if (!(REG(PSC_PTSTAT) & 0x02)) > + break; > + } > + > + REG(PSC_GBLCTL) &= ~0x1f; > +} > + > + > +int board_init(void) > +{ > + /* arch number of the board */ > + gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_EVM; > + > + /* address of boot parameters */ > + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; > + > + /* Workaround for TMS320DM6446 errata 1.3.22 */ > + REG(PSC_SILVER_BULLET) = 0; > + > + /* Power on required peripherals */ > + lpsc_on(DAVINCI_LPSC_EMAC); > + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); > + lpsc_on(DAVINCI_LPSC_MDIO); > + lpsc_on(DAVINCI_LPSC_I2C); > + lpsc_on(DAVINCI_LPSC_UART0); > + lpsc_on(DAVINCI_LPSC_UART2); > + lpsc_on(DAVINCI_LPSC_TIMER1); > + lpsc_on(DAVINCI_LPSC_GPIO); > + > + /* Powerup the DSP */ > + dsp_on(); > + > + /* Bringup UART0 and 2 out of reset */ > +// REG(UART0_PWREMU_MGMT) = 0x0000e003; /* Why does TI use reserved > bits or bit that MUST be set to 0? */ > + REG(UART0_PWREMU_MGMT) = 0x00006001; > + REG(UART2_PWREMU_MGMT) = 0x00006001; > + > + /* Enable GIO3.3V cells used for EMAC */ > + REG(VDD3P3V_PWDN) = 0; > + > + /* Enable UART0 and 2 MUX lines */ > + REG(PINMUX1) |= 1; //(0) > + REG(PINMUX1) |= 4; //(2) > + > + /* Enable EMAC and AEMIF pins */ > + REG(PINMUX0) = 0x80000c1f; > + > + /* Enable I2C pin Mux */ > + REG(PINMUX1) |= (1 << 7); > + > + /* Set the Bus Priority Register to appropriate value */ > + REG(VBPR) = 0x20; > + > + timer_init(); > + > + return(0); > +} > + > +int misc_init_r (void) > +{ > + int clk = 0; > + > + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + > 1); > + > + printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / > 2); > + printf ("DDR Clock : %dMHz\n", (clk / 2)); > + > + if (!eth_hw_init()) { > + printf("ethernet init failed!\n"); > + } else { > + printf("ETH PHY : %s\n", phy.name); > + } > + > + return(0); > +} > + > +int dram_init(void) > +{ > + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; > + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; > + > + return(0); > +} > diff --git a/board/prodrive/pmdra/u-boot.lds > b/board/prodrive/pmdra/u-boot.lds new file mode 100644 index > 0000000..710b2a2 > --- /dev/null > +++ b/board/prodrive/pmdra/u-boot.lds > @@ -0,0 +1,52 @@ > +/* > + * (C) Copyright 2002 > + * Gary Jennejohn, DENX Software Engineering, <[EMAIL PROTECTED]> > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", > "elf32-littlearm") > +OUTPUT_ARCH(arm) > +ENTRY(_start) > +SECTIONS > +{ > + . = 0x00000000; > + . = ALIGN(4); > + .text : > + { > + cpu/arm926ejs/start.o (.text) > + *(.text) > + } > + . = ALIGN(4); > + .rodata : { *(.rodata) } > + . = ALIGN(4); > + .data : { *(.data) } > + . = ALIGN(4); > + .got : { *(.got) } > + > + . = .; > + __u_boot_cmd_start = .; > + .u_boot_cmd : { *(.u_boot_cmd) } > + __u_boot_cmd_end = .; > + > + . = ALIGN(4); > + __bss_start = .; > + .bss : { *(.bss) } > + _end = .; > +} > diff --git a/include/configs/pmdra.h > b/include/configs/pmdra.h new file mode 100644 index 0000000..d6b3456 > --- /dev/null > +++ b/include/configs/pmdra.h > @@ -0,0 +1,184 @@ > +/* > + * Copyright (C) 2007 Sergey Kubushyn <[EMAIL PROTECTED]> > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +#ifndef __CONFIG_H > +#define __CONFIG_H > +#include <asm/sizes.h> > + > +/*=======*/ > +/* Board */ > +/*=======*/ > +#define CFG_PMDRA > +#define CFG_NAND_LARGEPAGE > +/*===================*/ > +/* SoC Configuration */ > +/*===================*/ > +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ > +#define CONFIG_SYS_CLK_FREQ (CFG_HZ_CLOCK * (CFG_DAVINCI_PLL1_PLLM + > 1)) / 2 > +#define CFG_TIMERBASE 0x01c21400 /* use > timer 0 */ > +#define CFG_HZ_CLOCK 27000000 /* Timer Input clock > freq */ > +#define CFG_HZ 1000 > +#define CFG_DAVINCI_PINMUX_0 0x00000c1f > +#define CFG_DAVINCI_WAITCFG 0x10000000 > +#define CFG_DAVINCI_ACFG2 0x00460385 /* NOR CE Config */ > +#define CFG_DAVINCI_ACFG3 0x0822218c /* NAND CE Config */ > +#define CFG_DAVINCI_ACFG4 0x3ffffffd > +#define CFG_DAVINCI_ACFG5 0x3ffffffd > +#define CFG_DAVINCI_NANDCE 3 /* Use CE3 for NAND */ > +#define CFG_DAVINCI_DDRCTL 0x50006405 /* DDR timing config */ > +#define CFG_DAVINCI_SDREF 0x000005c3 > +#define CFG_DAVINCI_SDCFG 0x00178832 /* 8 banks , CAS = 4*/ > +#define CFG_DAVINCI_SDTIM0 0x28923211 > +#define CFG_DAVINCI_SDTIM1 0x0016c722 > +#define CFG_DAVINCI_MMARG_BRF0 0x00444400 > +#define CFG_DAVINCI_PLL1_PLLM 0x12 /* > DM6446 = 0x15, DM6441 > = 0x12, DM6441_LV = 0x0e */ > +#define CFG_DAVINCI_PLL2_PLLM 0x17 /* 162 MHz */ > +#define CFG_DAVINCI_PLL2_DIV1 0x0b /* 54 MHz */ > +#define CFG_DAVINCI_PLL2_DIV2 0x01 > +/*====================================================*/ > +/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ > +/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ > +/*====================================================*/ > +#define CFG_I2C_EEPROM_ADDR_LEN 2 > +#define CFG_I2C_EEPROM_ADDR 0x50 > +#define CFG_EEPROM_PAGE_WRITE_BITS 6 > +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 > +/*=============*/ > +/* Memory Info */ > +/*=============*/ > +#define CFG_MALLOC_LEN (0x10000 + 128*1024) > /* malloc() len > */ > +#define CFG_GBL_DATA_SIZE 128 /* reserved for initial > data */ > +#define CFG_MEMTEST_START 0x80000000 /* memtest start address > */ > +#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test > */ > +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of > DRAM */ > +#define CONFIG_STACKSIZE (256*1024) /* regular stack */ > +#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ > +#define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */ > +#define DDR_8BANKS /* 8-bank DDR2 (256MB) > */ > +/*====================*/ > +/* Serial Driver info */ > +/*====================*/ > +#define CFG_NS16550 > +#define CFG_NS16550_SERIAL > +#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size > */ > +#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 > */ > +#define CFG_NS16550_COM2 0x01c20800 /* Base address of UART2 > */ > +#define CFG_NS16550_CLK 27000000 /* Input clock > to NS16550 */ > +#define CONFIG_CONS_INDEX 1 /* use UART0 for console > */ > +#define CONFIG_BAUDRATE 115200 /* Default baud > rate */ > +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } > +/*===================*/ > +/* I2C Configuration */ > +/*===================*/ > +#define CONFIG_HARD_I2C > +#define CONFIG_DRIVER_DAVINCI_I2C > +#define CFG_I2C_SPEED 50000 /* 100Kbps > won't work, silicon > bug */ > +#define CFG_I2C_SLAVE 10 /* Bogus, > master-only in U-Boot > */ > +/*==================================*/ > +/* Network & Ethernet Configuration */ > +/*==================================*/ > +#define CONFIG_DRIVER_TI_EMAC > +#define CONFIG_MII > +#define CONFIG_BOOTP_DEFAULT > +#define CONFIG_BOOTP_DNS > +#define CONFIG_BOOTP_DNS2 > +#define CONFIG_BOOTP_SEND_HOSTNAME > +#define CONFIG_NET_RETRY_COUNT 10 > +/*=====================*/ > +/* Flash & Environment */ > +/*=====================*/ > +#define CFG_USE_NAND > +#define CFG_NAND_BASE 0x04000000 > +#define CFG_NAND_HW_ECC > +#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ > +#define NAND_MAX_CHIPS 1 > +#undef CONFIG_SKIP_LOWLEVEL_INIT > +#undef CONFIG_SKIP_RELOCATE_UBOOT > +#define DEF_BOOTM "" > +#define CFG_ENV_IS_IN_FLASH 1 > +#undef CFG_NO_FLASH > +#define CFG_FLASH_CFI_DRIVER > +#define CFG_FLASH_CFI > +#define CFG_MAX_FLASH_BANKS 1 /* max number of flash > banks */ > +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x40000) > +#define CFG_ENV_OFFSET (CFG_ENV_ADDR) > +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes > (20x faster) */ > +#define PHYS_FLASH_1 0x02000000 /* CS2 Base address > */ > +#define CFG_FLASH_BASE PHYS_FLASH_1 /* > Flash Base for U-Boot > */ > +#define PHYS_FLASH_SIZE 0x2000000 /* Flash size > 32MB */ > +#define CFG_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ) > +#define CFG_ENV_SECT_SIZE CFG_FLASH_SECT_SZ /* Env sector > Size */ > +#define CFG_FLASH_SECT_SZ 0x20000 /* 128KB sect size INTEL > Flash */ > +#define CFG_FLASH_PROTECTION 1 > +/*==============================*/ > +/* U-Boot general configuration */ > +/*==============================*/ > +#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot > */ > +#define CONFIG_MISC_INIT_R > +#define CONFIG_BOOTFILE "uImage" /* Boot file > name */ > +#define CFG_PROMPT "U-Boot > " /* Monitor Command > Prompt */ > +#define CFG_CBSIZE 1024 /* Console I/O Buffer > Size */ > +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) > /* Print buffer sz */ > +#define CFG_MAXARGS 16 /* max number of command > args */ > +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer > Size */ > +#define CFG_LOAD_ADDR 0x80700000 /* > default Linux kernel > load address */ > +#define CONFIG_VERSION_VARIABLE > +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, > may be later */ > +#define CFG_HUSH_PARSER > +#define CFG_PROMPT_HUSH_PS2 "> " > +#define CONFIG_CMDLINE_EDITING > +#define CFG_LONGHELP > +#define CONFIG_CRC32_VERIFY > +#define CONFIG_MX_CYCLIC > +/*===================*/ > +/* Linux Information */ > +/*===================*/ > +#define LINUX_BOOT_PARAM_ADDR 0x80000100 > +#define CONFIG_CMDLINE_TAG > +#define CONFIG_SETUP_MEMORY_TAGS > +#define CONFIG_BOOTDELAY 2 > +#define CONFIG_BOOTARGS "mem=120M console=ttyS0,115200n8 > root=/dev/hda1 rw noinitrd ip=dhcp" > +#define CONFIG_BOOTCOMMAND "run nand" > +#define CONFIG_EXTRA_ENV_SETTINGS "ethaddr=00:11:22:33:44:55\n" > +/*=================*/ > +/* U-Boot commands */ > +/*=================*/ > +#include <config_cmd_default.h> > +#define CONFIG_CMD_ASKENV > +#define CONFIG_CMD_DHCP > +#define CONFIG_CMD_DIAG > +#define CONFIG_CMD_I2C > +#define CONFIG_CMD_MII > +#define CONFIG_CMD_PING > +#define CONFIG_CMD_SAVES > +#define CONFIG_CMD_EEPROM > +#undef CONFIG_CMD_BDI > +#undef CONFIG_CMD_FPGA > +#undef CONFIG_CMD_SETGETDCR > +#define CONFIG_CMD_FLASH > +#undef CONFIG_CMD_IMLS > +#define CONFIG_CMD_NAND > +/*=======================*/ > +/* KGDB support (if any) */ > +/*=======================*/ > +#ifdef CONFIG_CMD_KGDB > +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port > */ > +#define CONFIG_KGDB_SER_INDEX 1 /* which serial > port to use */ > +#endif > +#endif /* __CONFIG_H */ > -- > 1.5.3.7 > > > > Pieter Voorthuijsen > Prodrive B.V. > Science Park Eindhoven > P.O. box 28030 > 5602 JA Eindhoven > The Netherlands > > Email [EMAIL PROTECTED] > Tel: +31-40-2676258 > Fax: +31-40-2676201 > ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ U-Boot-Users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/u-boot-users
