Signed-off-by: Shinya Kuribayashi <[EMAIL PROTECTED]> --- cpu/mips/cache.S | 9 +++++---- 1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S index bda9bb1..2998a3b 100644 --- a/cpu/mips/cache.S +++ b/cpu/mips/cache.S @@ -32,10 +32,11 @@ #define RA t8 - /* 16KB is the maximum size of instruction and data caches on - * MIPS 4K. - */ -#define MIPS_MAX_CACHE_SIZE 0x4000 +/* + * 16kB is the maximum size of instruction and data caches on MIPS 4K, + * 64kB is on 4KE, 24K, 5K, 34K, etc. Set bigger size for convenience. + */ +#define MIPS_MAX_CACHE_SIZE 0x10000 #define INDEX_BASE KSEG0 ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ U-Boot-Users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/u-boot-users
