Andy,
thanks for your comments.
Andy Fleming schrieb:
> On Thu, Apr 24, 2008 at 9:45 AM, Andre Schwarz
> <[EMAIL PROTECTED]> wrote:
>
>
>> {MIIM_VSC8601_EPHY_CON,MIIM_VSC8601_EPHY_CON_INIT_SKEW,NULL},
>> +#if defined(CFG_VSC8601_SKEW_TX) && defined(CFG_VSC8601_SKEW_RX)
>> + {MIIM_EXT_PAGE_ACCESS,1,NULL},
>> +#define VSC8101_SKEW (CFG_VSC8601_SKEW_TX<<14)|(CFG_VSC8601_SKEW_RX<<12)
>> + {MIIM_VSC8601_SKEW_CTRL,VSC8101_SKEW,NULL},
>> + {MIIM_EXT_PAGE_ACCESS,0,NULL},
>> +#endif
>> #endif
>>
>
>
> I'm not sure this is the best solution to this. It seems like it
> wouldn't scale well. Either we need to set a bit somewhere that the
> phy driver can read (and thereby determine how to configure the skew),
> or we need to set the value to write in the board config file. I'm
> partial to the first solution, as it encapsulates the information
> inside the code that deals with it.
>
> [...]
>
>
I don't understand "scale well". What should be scalable ?
Of course using a function would be better.
I silently assumed that the other bits are set to zero which is true
after reset.
There are only two other bits : Packet size and 10M preamble mode.
Both should be left untouched, i.e. "0".
>> /* Broadcom BCM54xx -- taken from linux sungem_phy */
>> #define MIIM_BCM54xx_AUXSTATUS 0x19
>> #define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK 0x0700
>> @@ -163,6 +165,8 @@
>> /* Vitesse VSC8601 Extended PHY Control Register 1 */
>> #define MIIM_VSC8601_EPHY_CON 0x17
>> #define MIIM_VSC8601_EPHY_CON_INIT_SKEW 0x1120
>> +#define MIIM_VSC8601_SKEW_CTRL 0x1c
>> +#define MIIM_VSC8601_EPHY_CON_INIT_SKEW 0x1120
>>
>
> Am I crazy, or did you just doubly define MIIM_VSC8601_EPHY_CON_INIT_SKEW?
>
This obviously is a mistake - sorry.
regards,
Andre
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