Rewrite the nand_wait() FL_ERASING case to handle CFG_HZ values in the
MHZ range. This is needed for mips processors, as the timer's timebase
ticks at CPU clock frequency.
Signed-off-by: Jason McMullan <[EMAIL PROTECTED]>
---
drivers/mtd/nand/nand_base.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 2da1d46..ac690ac 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -837,10 +837,17 @@ static int nand_wait(struct mtd_info *mtd, struct
nand_chip *this, int state)
{
unsigned long timeo;
+#if CFG_HZ > 100000
+ if (state == FL_ERASING)
+ timeo = (CFG_HZ / 1000) * 400;
+ else
+ timeo = (CFG_HZ / 1000) * 20;
+#else
if (state == FL_ERASING)
timeo = (CFG_HZ * 400) / 1000;
else
timeo = (CFG_HZ * 20) / 1000;
+#endif
if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
--
1.5.4.3
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