From: Dave Liu <[EMAIL PROTECTED]>

The rtl8139 driver doesn't need KSEG again, remove
it. the _IO_BASE has default value as 0, so also
remove it.

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 include/configs/HIDDEN_DRAGON.h |    3 ---
 include/configs/MPC8349ITX.h    |    6 ------
 include/configs/MPC8544DS.h     |    6 ------
 include/configs/MPC8610HPCD.h   |    4 ----
 include/configs/MPC8641HPCN.h   |    4 ----
 include/configs/mpc7448hpc2.h   |    3 ---
 6 files changed, 0 insertions(+), 26 deletions(-)

diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h
index 26dd954..33e5939 100644
--- a/include/configs/HIDDEN_DRAGON.h
+++ b/include/configs/HIDDEN_DRAGON.h
@@ -103,9 +103,6 @@
 #define PCI_ENET1_MEMADDR      0x81000000
 
 #define CONFIG_RTL8139
-#define _IO_BASE           0x00000000
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x)       (x)
 /* Make sure the ethaddr can be overwritten
    TODO: Remove this on final product
 */
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 38410a1..dfacbe1 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -347,16 +347,10 @@ boards, we say we have two, but don't display a message 
if we find only one. */
 #define CFG_PCI2_IO_SIZE       0x01000000      /* 16M */
 #endif
 
-#define _IO_BASE               0x00000000      /* points to PCI I/O space */
 
 #define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x)       (x)
-#endif
-
 #ifndef CONFIG_PCI_PNP
     #define PCI_ENET0_IOADDR   0x00000000
     #define PCI_ENET0_MEMADDR  CFG_PCI2_MEM_BASE
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index ffe9e00..1e77808 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -325,12 +325,6 @@ extern unsigned long get_board_sys_clk(unsigned long 
dummy);
 #undef CONFIG_TULIP
 #define CONFIG_RTL8139
 
-#ifdef CONFIG_RTL8139
-/* This macro is used by RTL8139 but not defined in PPC architecture */
-#define KSEG1ADDR(x)           (x)
-#define _IO_BASE       0x00000000
-#endif
-
 #ifndef CONFIG_PCI_PNP
        #define PCI_ENET0_IOADDR        CFG_PCI1_IO_BASE
        #define PCI_ENET0_MEMADDR       CFG_PCI1_IO_BASE
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index a051b6d..a0ad515 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -288,10 +288,6 @@
 #define CFG_PCI_MEMORY_PHYS    0x00000000
 #define CFG_PCI_MEMORY_SIZE    0x80000000
 
-/* For RTL8139 */
-#define KSEG1ADDR(x)   ({u32 _x = le32_to_cpu(*(u32 *)(x)); (&_x); })
-#define _IO_BASE               0x00000000
-
 /* controller 1, Base address 0xa000 */
 #define CFG_PCIE1_MEM_BASE     0xa0000000
 #define CFG_PCIE1_MEM_PHYS     CFG_PCIE1_MEM_BASE
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 49ee7ff..f959367 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -313,10 +313,6 @@ extern unsigned long get_board_sys_clk(unsigned long 
dummy);
 #define CFG_PCI_MEMORY_PHYS    0x00000000
 #define CFG_PCI_MEMORY_SIZE    0x80000000
 
-/* For RTL8139 */
-#define KSEG1ADDR(x)           ({u32 _x=le32_to_cpu(*(u32 *)(x)); (&_x);})
-#define _IO_BASE               0x00000000
-
 #define CFG_PCI2_MEM_BASE      0xa0000000
 #define CFG_PCI2_MEM_PHYS      CFG_PCI2_MEM_BASE
 #define CFG_PCI2_MEM_SIZE      0x20000000      /* 512M */
diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h
index a218f75..e426f41 100644
--- a/include/configs/mpc7448hpc2.h
+++ b/include/configs/mpc7448hpc2.h
@@ -123,8 +123,6 @@
 
 /* Networking Configuration */
 
-#define KSEG1ADDR(a)   (a)     /* Needed by the rtl8139 driver */
-
 #define CONFIG_TSI108_ETH
 #define CONFIG_TSI108_ETH_NUM_PORTS    2
 
@@ -301,7 +299,6 @@
 
 #define CFG_PCI_IO_SIZE                0x01000000      /* 16MB */
 
-#define _IO_BASE               0x00000000      /* points to PCI I/O space      
*/
 
 /* PCI Config Space mapping */
 #define CFG_PCI_CFG_BASE       0xfb000000      /* Changed from FE000000 */
-- 
1.5.5




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