This patch adds support for the Micronas VCT board series.
Currently the following platforms are supported:
vct_premium
vct_premium_small
vct_premium_onenand
vct_premium_onenand_small
vct_platinum
vct_platinum_small
vct_platinum_onenand
vct_platinum_onenand_small
vct_platinumavc
vct_platinumavc_small
vct_platinumavc_onenand
vct_platinumavc_onenand_small
One speciality of the VCT board is that it can't access NOR FLASH
memory-mapped. It has to use special access functions for this.
Signed-off-by: Stefan Roese <s...@denx.de>
---
v2:
- Fixed issues in u-boot.lds mentioned by Andrew Dyer
board/micronas/vct/Makefile | 56 +++++
board/micronas/vct/config.mk | 31 +++
board/micronas/vct/ebi.c | 48 +++++
board/micronas/vct/ebi_nor_flash.c | 131 ++++++++++++
board/micronas/vct/ebi_onenand.c | 168 +++++++++++++++
board/micronas/vct/ebi_smc911x.c | 94 +++++++++
board/micronas/vct/gpio.c | 88 ++++++++
board/micronas/vct/smc_eeprom.c | 394 ++++++++++++++++++++++++++++++++++++
board/micronas/vct/top.c | 289 ++++++++++++++++++++++++++
board/micronas/vct/u-boot.lds | 71 +++++++
board/micronas/vct/vct.c | 117 +++++++++++
11 files changed, 1487 insertions(+), 0 deletions(-)
create mode 100644 board/micronas/vct/Makefile
create mode 100644 board/micronas/vct/config.mk
create mode 100644 board/micronas/vct/ebi.c
create mode 100644 board/micronas/vct/ebi_nor_flash.c
create mode 100644 board/micronas/vct/ebi_onenand.c
create mode 100644 board/micronas/vct/ebi_smc911x.c
create mode 100644 board/micronas/vct/gpio.c
create mode 100644 board/micronas/vct/smc_eeprom.c
create mode 100644 board/micronas/vct/top.c
create mode 100644 board/micronas/vct/u-boot.lds
create mode 100644 board/micronas/vct/vct.c
diff --git a/board/micronas/vct/Makefile b/board/micronas/vct/Makefile
new file mode 100644
index 0000000..2f8ece6
--- /dev/null
+++ b/board/micronas/vct/Makefile
@@ -0,0 +1,56 @@
+#
+# (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS-y := $(BOARD).o
+COBJS-y += ebi.o
+COBJS-$(CONFIG_VCT_NOR) += ebi_nor_flash.o
+COBJS-$(CONFIG_VCT_ONENAND) += ebi_onenand.o
+COBJS-$(CONFIG_DRIVER_SMC911X) += ebi_smc911x.o smc_eeprom.o
+COBJS-y += gpio.o
+COBJS-y += top.o
+
+COBJS := $(sort $(COBJS-y))
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/micronas/vct/config.mk b/board/micronas/vct/config.mk
new file mode 100644
index 0000000..2a71dad
--- /dev/null
+++ b/board/micronas/vct/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# vct_xxx boards with MIPS 4Kc CPU core
+#
+
+sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+TEXT_BASE = 0x87000000
+endif
diff --git a/board/micronas/vct/ebi.c b/board/micronas/vct/ebi.c
new file mode 100644
index 0000000..8e93f69
--- /dev/null
+++ b/board/micronas/vct/ebi.c
@@ -0,0 +1,48 @@
+/*
+ * (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+ *
+ * Copyright (C) 2006 Micronas GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include "vct.h"
+
+int ebi_initialize(void)
+{
+#if defined(CONFIG_VCT_NOR)
+ if (ebi_init_nor_flash())
+ return -1;
+#endif
+
+#if defined(CONFIG_VCT_ONENAND)
+ if (ebi_init_onenand())
+ return -1;
+#endif
+
+#if defined(CONFIG_DRIVER_SMC911X)
+ if (ebi_init_smc911x())
+ return -1;
+#endif
+
+ reg_write(EBI_CTRL_SIG_ACTLV(EBI_BASE), 0x00004100);
+
+ ebi_wait();
+
+ return 0;
+}
diff --git a/board/micronas/vct/ebi_nor_flash.c
b/board/micronas/vct/ebi_nor_flash.c
new file mode 100644
index 0000000..ae87643
--- /dev/null
+++ b/board/micronas/vct/ebi_nor_flash.c
@@ -0,0 +1,131 @@
+/*
+ * (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include "vct.h"
+
+static u32 ebi_read(u32 addr)
+{
+ addr &= ~0xFC000000;
+
+ reg_write(EBI_CPU_IO_ACCS(EBI_BASE), EXT_DEVICE_CHANNEL_2 | addr);
+ ebi_wait();
+
+ return reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
+}
+
+static int ebi_write_u16(u32 addr, u32 data, int fetchIO)
+{
+ u32 val = (data << 16);
+
+ addr &= ~0xFC000000;
+
+ ebi_wait();
+
+ reg_write(EBI_IO_ACCS_DATA(EBI_BASE), val);
+ reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
+ EXT_DEVICE_CHANNEL_2 | EBI_CPU_WRITE | addr);
+ ebi_wait();
+
+ if (fetchIO) {
+ u32 counter = 0;
+ while (!(reg_read(EBI_SIG_LEVEL(EBI_BASE)) & EXT_CPU_IORDY_SL))
{
+ if (counter++ > 0xFFFFFF)
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
+static u16 ebi_read_u16(u32 addr)
+{
+ return ((ebi_read(addr) >> 16) & 0xFFFF);
+}
+
+static u8 ebi_read_u8(u32 addr)
+{
+ u32 val = ebi_read(addr) >> 16;
+
+ if (addr & 0x1)
+ return val & 0xff;
+ else
+ return (val >> 8) & 0xff;
+}
+
+/*
+ * EBI initialization for NOR FLASH access
+ */
+int ebi_init_nor_flash(void)
+{
+ reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000);
+
+ reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x400002);
+ reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50);
+
+ reg_write(EBI_DEV2_TIM1_RD1(EBI_BASE), 0x409113);
+ reg_write(EBI_DEV2_TIM1_RD2(EBI_BASE), 0xFF01000);
+ reg_write(EBI_DEV2_TIM1_WR1(EBI_BASE), 0x04003113);
+ reg_write(EBI_DEV2_TIM1_WR2(EBI_BASE), 0x3FC12011);
+ reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000);
+
+ return 0;
+}
+
+/*
+ * Accessor functions replacing the "weak" functions in
+ * drivers/mtd/cfi_flash.c
+ */
+void flash_write8(u8 value, void *addr)
+{
+ ebi_write_u16((u32)addr, value, 0);
+}
+
+void flash_write16(u16 value, void *addr)
+{
+ ebi_write_u16((u32)addr, value, 0);
+}
+
+u8 flash_read8(void *addr)
+{
+ return ebi_read_u8((u32)addr);
+}
+
+u16 flash_read16(void *addr)
+{
+ return ebi_read_u16((u32)addr);
+}
+
+u32 flash_read32(void *addr)
+{
+ return ((u32)ebi_read_u16((u32)addr) << 16) |
+ ebi_read_u16((u32)addr + 2);
+}
+
+void *board_flash_read_memcpy(void *dest, const void *src, size_t count)
+{
+ u16 *tmp = (u16 *)dest, *s = (u16 *)src;
+ int i;
+
+ for (i = 0; i < count; i += 2)
+ *tmp++ = flash_read16(s++);
+
+ return dest;
+}
diff --git a/board/micronas/vct/ebi_onenand.c b/board/micronas/vct/ebi_onenand.c
new file mode 100644
index 0000000..5da59b5
--- /dev/null
+++ b/board/micronas/vct/ebi_onenand.c
@@ -0,0 +1,168 @@
+/*
+ * (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/onenand.h>
+#include "vct.h"
+
+static u16 ebi_nand_read_word(void __iomem *addr)
+{
+ reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_2 |
(u32)addr));
+ ebi_wait();
+
+ return reg_read(EBI_IO_ACCS_DATA(EBI_BASE)) >> 16;
+}
+
+static void ebi_nand_write_word(u16 data, void __iomem * addr)
+{
+ ebi_wait();
+ reg_write(EBI_IO_ACCS_DATA(EBI_BASE), (data << 16));
+ reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
+ EXT_DEVICE_CHANNEL_2 | EBI_CPU_WRITE | (u32)addr);
+ ebi_wait();
+}
+
+/*
+ * EBI initialization for OneNAND FLASH access
+ */
+int ebi_init_onenand(void)
+{
+ reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000);
+
+ reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x00403002);
+ reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50);
+
+ reg_write(EBI_DEV3_CONFIG1(EBI_BASE), 0x00403002);
+ reg_write(EBI_DEV3_CONFIG2(EBI_BASE), 0x0); /* byte/word ordering */
+
+ reg_write(EBI_DEV2_TIM1_RD1(EBI_BASE), 0x00504000);
+ reg_write(EBI_DEV2_TIM1_RD2(EBI_BASE), 0x00001000);
+ reg_write(EBI_DEV2_TIM1_WR1(EBI_BASE), 0x12002223);
+ reg_write(EBI_DEV2_TIM1_WR2(EBI_BASE), 0x3FC02220);
+ reg_write(EBI_DEV3_TIM1_RD1(EBI_BASE), 0x00504000);
+ reg_write(EBI_DEV3_TIM1_RD2(EBI_BASE), 0x00001000);
+ reg_write(EBI_DEV3_TIM1_WR1(EBI_BASE), 0x05001000);
+ reg_write(EBI_DEV3_TIM1_WR2(EBI_BASE), 0x00010200);
+
+ reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000);
+ reg_write(EBI_DEV2_EXT_ACC(EBI_BASE), 0x0FFFFFFF);
+
+ reg_write(EBI_DEV3_TIM_EXT(EBI_BASE), 0xFFF00000);
+ reg_write(EBI_DEV3_EXT_ACC(EBI_BASE), 0x0FFFFFFF);
+
+ /* prepare DMA configuration for EBI */
+ reg_write(EBI_DEV3_FIFO_CONFIG(EBI_BASE), 0x0101ff00);
+
+ /* READ only no byte order change, TAG 1 used */
+ reg_write(EBI_DEV3_DMA_CONFIG2(EBI_BASE), 0x00000004);
+
+ reg_write(EBI_TAG1_SYS_ID(EBI_BASE), 0x0); /* SCC DMA channel 0 */
+ reg_write(EBI_TAG2_SYS_ID(EBI_BASE), 0x1);
+ reg_write(EBI_TAG3_SYS_ID(EBI_BASE), 0x2);
+ reg_write(EBI_TAG4_SYS_ID(EBI_BASE), 0x3);
+
+ return 0;
+}
+
+static void *memcpy_16_from_onenand(void *dst, const void *src, unsigned int
len)
+{
+ void *ret = dst;
+ u16 *d = dst;
+ u16 *s = (u16 *)src;
+
+ len >>= 1;
+ while (len-- > 0)
+ *d++ = ebi_nand_read_word(s++);
+
+ return ret;
+}
+
+static void *memcpy_16_to_onenand(void *dst, const void *src, unsigned int len)
+{
+ void *ret = dst;
+ u16 *d = dst;
+ u16 *s = (u16 *)src;
+
+ len >>= 1;
+ while (len-- > 0)
+ ebi_nand_write_word(*s++, d++);
+
+ return ret;
+}
+
+static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
+{
+ struct onenand_chip *this = mtd->priv;
+
+ if (ONENAND_CURRENT_BUFFERRAM(this)) {
+ if (area == ONENAND_DATARAM)
+ return mtd->writesize;
+ if (area == ONENAND_SPARERAM)
+ return mtd->oobsize;
+ }
+
+ return 0;
+}
+
+static int ebi_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
+ unsigned char *buffer, int offset,
+ size_t count)
+{
+ struct onenand_chip *this = mtd->priv;
+ void __iomem *bufferram;
+
+ bufferram = this->base + area;
+ bufferram += onenand_bufferram_offset(mtd, area);
+
+ memcpy_16_from_onenand(buffer, bufferram + offset, count);
+
+ return 0;
+}
+
+static int ebi_write_bufferram(struct mtd_info *mtd, loff_t addr, int area,
+ const unsigned char *buffer, int offset,
+ size_t count)
+{
+ struct onenand_chip *this = mtd->priv;
+ void __iomem *bufferram;
+
+ bufferram = this->base + area;
+ bufferram += onenand_bufferram_offset(mtd, area);
+
+ memcpy_16_to_onenand(bufferram + offset, buffer, count);
+
+ return 0;
+}
+
+void onenand_board_init(struct mtd_info *mtd)
+{
+ struct onenand_chip *chip = mtd->priv;
+
+ /*
+ * Insert board specific OneNAND access functions
+ */
+ chip->read_word = ebi_nand_read_word;
+ chip->write_word = ebi_nand_write_word;
+
+ chip->read_bufferram = ebi_read_bufferram;
+ chip->read_spareram = ebi_read_bufferram;
+ chip->write_bufferram = ebi_write_bufferram;
+}
diff --git a/board/micronas/vct/ebi_smc911x.c b/board/micronas/vct/ebi_smc911x.c
new file mode 100644
index 0000000..e1b67a0
--- /dev/null
+++ b/board/micronas/vct/ebi_smc911x.c
@@ -0,0 +1,94 @@
+/*
+ * (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include "vct.h"
+
+/*
+ * EBI initialization for SMC911x access
+ */
+int ebi_init_smc911x(void)
+{
+ reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020);
+ reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
+
+ reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100);
+ reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111);
+
+ reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000);
+ reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF);
+
+ reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100);
+ reg_write(EBI_DEV1_TIM1_WR2(EBI_BASE), 0x3FC21110);
+
+ return 0;
+}
+
+/*
+ * Accessor functions replacing the "weak" functions in
+ * drivers/net/smc911x.c
+ */
+u32 smc911x_reg_read(u32 addr)
+{
+ volatile u32 data;
+
+ reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
+ ebi_wait();
+ reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr));
+ ebi_wait();
+ data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
+
+ return (data);
+}
+
+void smc911x_reg_write(u32 addr, u32 data)
+{
+ reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F);
+ ebi_wait();
+ reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data);
+ reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
+ EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr);
+ ebi_wait();
+}
+
+void pkt_data_push(u32 addr, u32 data)
+{
+ reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A);
+ ebi_wait();
+ reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data);
+ reg_write(EBI_CPU_IO_ACCS(EBI_BASE),
+ EXT_DEVICE_CHANNEL_1 | EBI_CPU_WRITE | addr);
+ ebi_wait();
+
+ return;
+}
+
+u32 pkt_data_pull(u32 addr)
+{
+ volatile u32 data;
+
+ reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004A);
+ ebi_wait();
+ reg_write(EBI_CPU_IO_ACCS(EBI_BASE), (EXT_DEVICE_CHANNEL_1 | addr));
+ ebi_wait();
+ data = reg_read(EBI_IO_ACCS_DATA(EBI_BASE));
+
+ return data;
+}
diff --git a/board/micronas/vct/gpio.c b/board/micronas/vct/gpio.c
new file mode 100644
index 0000000..2c113be
--- /dev/null
+++ b/board/micronas/vct/gpio.c
@@ -0,0 +1,88 @@
+/*
+ * (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include "vct.h"
+
+/*
+ * Find out to which of the 2 gpio modules the pin specified in the
+ * argument belongs:
+ * GPIO_MODULE yields 0 for pins 0 to 31,
+ * 1 for pins 32 to 63
+ */
+#define GPIO_MODULE(pin) ((pin) >> 5)
+
+/*
+ * Bit position within a 32-bit peripheral register (where every
+ * bit is one bitslice)
+ */
+#define MASK(pin) (1 << ((pin) & 0x1F))
+#define BASE_ADDR(mod) module_base[mod]
+
+/*
+ * Lookup table for transforming gpio module number 0 to 2 to
+ * address offsets
+ */
+static u32 module_base[] = {
+ GPIO1_BASE,
+ GPIO2_BASE
+};
+
+static void clrsetbits(u32 addr, u32 and_mask, u32 or_mask)
+{
+ reg_write(addr, (reg_read(addr) & ~and_mask) | or_mask);
+}
+
+int vct_gpio_dir(int pin, int dir)
+{
+ u32 gpio_base;
+
+ gpio_base = BASE_ADDR(GPIO_MODULE(pin));
+
+ if (dir == 0)
+ clrsetbits(GPIO_SWPORTA_DDR(gpio_base), MASK(pin), 0);
+ else
+ clrsetbits(GPIO_SWPORTA_DDR(gpio_base), 0, MASK(pin));
+
+ return 0;
+}
+
+void vct_gpio_set(int pin, int val)
+{
+ u32 gpio_base;
+
+ gpio_base = BASE_ADDR(GPIO_MODULE(pin));
+
+ if (val == 0)
+ clrsetbits(GPIO_SWPORTA_DR(gpio_base), MASK(pin), 0);
+ else
+ clrsetbits(GPIO_SWPORTA_DR(gpio_base), 0, MASK(pin));
+}
+
+int vct_gpio_get(int pin)
+{
+ u32 gpio_base;
+ u32 value;
+
+ gpio_base = BASE_ADDR(GPIO_MODULE(pin));
+ value = reg_read(GPIO_EXT_PORTA(gpio_base));
+
+ return ((value & MASK(pin)) ? 1 : 0);
+}
diff --git a/board/micronas/vct/smc_eeprom.c b/board/micronas/vct/smc_eeprom.c
new file mode 100644
index 0000000..2bc7ad4
--- /dev/null
+++ b/board/micronas/vct/smc_eeprom.c
@@ -0,0 +1,394 @@
+/*
+ * (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+ *
+ * Copyright 2005, Seagate Technology LLC
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#undef DEBUG
+
+#include <common.h>
+#include <command.h>
+#include <config.h>
+#include <net.h>
+
+#include "vct.h"
+
+#define SMSC9118_BASE CONFIG_DRIVER_SMC911X_BASE
+#define BYTE_TEST (SMSC9118_BASE + 0x64)
+#define GPIO_CFG (SMSC9118_BASE + 0x88)
+#define MAC_CSR_CMD (SMSC9118_BASE + 0xA4)
+#define MAC_CSR_CMD_CSR_BUSY (0x80000000)
+#define MAC_CSR_CMD_RNW (0x40000000)
+#define MAC_RD_CMD(reg) ((reg & 0x000000FF) | \
+ (MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_RNW))
+#define MAC_WR_CMD(reg) ((reg & 0x000000FF) | \
+ (MAC_CSR_CMD_CSR_BUSY))
+#define MAC_CSR_DATA (SMSC9118_BASE + 0xA8)
+#define E2P_CMD (SMSC9118_BASE + 0xB0)
+#define E2P_CMD_EPC_BUSY_ (0x80000000UL) /* Self Clearing */
+#define E2P_CMD_EPC_CMD_ (0x70000000UL) /* R/W */
+#define E2P_CMD_EPC_CMD_READ_ (0x00000000UL) /* R/W */
+#define E2P_CMD_EPC_CMD_EWDS_ (0x10000000UL) /* R/W */
+#define E2P_CMD_EPC_CMD_EWEN_ (0x20000000UL) /* R/W */
+#define E2P_CMD_EPC_CMD_WRITE_ (0x30000000UL) /* R/W */
+#define E2P_CMD_EPC_CMD_WRAL_ (0x40000000UL) /* R/W */
+#define E2P_CMD_EPC_CMD_ERASE_ (0x50000000UL) /* R/W */
+#define E2P_CMD_EPC_CMD_ERAL_ (0x60000000UL) /* R/W */
+#define E2P_CMD_EPC_CMD_RELOAD_ (0x70000000UL) /* R/W */
+#define E2P_CMD_EPC_TIMEOUT_ (0x00000200UL) /* R */
+#define E2P_CMD_MAC_ADDR_LOADED_ (0x00000100UL) /* RO */
+#define E2P_CMD_EPC_ADDR_ (0x000000FFUL) /* R/W */
+#define E2P_DATA (SMSC9118_BASE + 0xB4)
+
+#define MAC_ADDRH (0x2)
+#define MAC_ADDRL (0x3)
+
+#define MAC_TIMEOUT 200
+
+#define HIBYTE(word) ((u8)(((u16)(word)) >> 8))
+#define LOBYTE(word) ((u8)(((u16)(word)) & 0x00FFU))
+#define HIWORD(dword) ((u16)(((u32)(dword)) >> 16))
+#define LOWORD(dword) ((u16)(((u32)(dword)) & 0x0000FFFFUL))
+
+static int mac_busy(int req_to)
+{
+ int timeout = req_to;
+
+ while (timeout--) {
+ if (!(smc911x_reg_read(MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY))
+ goto done;
+ }
+ return 1; /* Timeout */
+
+done:
+ return 0; /* No timeout */
+}
+
+static ulong get_mac_reg(int reg)
+{
+ ulong reg_val = 0xffffffff;
+
+ if (smc911x_reg_read(MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY) {
+ printf("get_mac_reg: previous command not complete\n");
+ goto done;
+ }
+
+ smc911x_reg_write(MAC_CSR_CMD, MAC_RD_CMD(reg));
+ udelay(10000);
+
+ if (mac_busy(MAC_TIMEOUT) == 1) {
+ printf("get_mac_reg: timeout waiting for response from MAC\n");
+ goto done;
+ }
+
+ reg_val = smc911x_reg_read(MAC_CSR_DATA);
+
+done:
+ return (reg_val);
+}
+
+static ulong eeprom_enable_access(void)
+{
+ ulong gpio;
+
+ gpio = smc911x_reg_read(GPIO_CFG);
+ debug("%s: gpio= 0x%08lx ---> 0x%08lx\n", __func__, gpio,
+ (gpio & 0xFF0FFFFFUL));
+
+ smc911x_reg_write(GPIO_CFG, (gpio & 0xFF0FFFFFUL));
+ return gpio;
+}
+
+static void eeprom_disable_access(ulong gpio)
+{
+ debug("%s: gpio= 0x%08lx\n", __func__, gpio);
+ smc911x_reg_write(GPIO_CFG, gpio);
+}
+
+static int eeprom_is_mac_address_loaded(void)
+{
+ int ret;
+
+ ret = smc911x_reg_read(MAC_CSR_CMD) & E2P_CMD_MAC_ADDR_LOADED_;
+ debug("%s: ret = %x\n", __func__, ret);
+
+ return ret;
+}
+
+static int eeprom_read_location(unchar address, u8 *data)
+{
+ ulong timeout = 100000;
+ ulong temp = 0;
+
+ if ((temp = smc911x_reg_read(E2P_CMD)) & E2P_CMD_EPC_BUSY_) {
+ printf("%s: Busy at start, E2P_CMD=0x%08lX\n", __func__, temp);
+ return 0;
+ }
+
+ smc911x_reg_write(E2P_CMD,
+ (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_ |
+ ((ulong) address)));
+
+ while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) &
E2P_CMD_EPC_BUSY_)) {
+ udelay(10);
+ timeout--;
+ }
+
+ if (timeout == 0) {
+ printf("Timeout\n");
+ return 0;
+ }
+ (*data) = (unchar) (smc911x_reg_read(E2P_DATA));
+ debug("%s: ret = %x\n", __func__, (*data));
+
+ return 1;
+}
+
+static int eeprom_enable_erase_and_write(void)
+{
+ ulong timeout = 100000;
+
+ if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
+ printf("%s: Busy at start\n", __func__);
+ return 0;
+ }
+ smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_));
+
+ while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) &
E2P_CMD_EPC_BUSY_)) {
+ udelay(10);
+ timeout--;
+ }
+
+ if (timeout == 0) {
+ printf("Timeout[1]\n");
+ return 0;
+ }
+
+ return 1;
+}
+
+static int eeprom_disable_erase_and_write(void)
+{
+ ulong timeout = 100000;
+
+ if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
+ printf("%s: Busy at start\n", __func__);
+ return 0;
+ }
+ smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWDS_));
+
+ while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) &
E2P_CMD_EPC_BUSY_)) {
+ udelay(10);
+ timeout--;
+ }
+
+ if (timeout == 0) {
+ printf("Timeout[2]\n");
+ return 0;
+ }
+
+ return 1;
+}
+
+static int eeprom_write_location(unchar address, unchar data)
+{
+ ulong timeout = 100000;
+
+ debug("%s: address: %x data = %x\n", __func__, address, data);
+
+ if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
+ printf("%s: Busy at start\n", __func__);
+ return 0;
+ }
+
+ smc911x_reg_write(E2P_DATA, ((ulong) data));
+ smc911x_reg_write(E2P_CMD,
+ (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_ |
+ ((ulong) address)));
+
+ while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) &
E2P_CMD_EPC_BUSY_)) {
+ udelay(10);
+ timeout--;
+ }
+
+ if (timeout == 0) {
+ printf("Timeout[3]\n");
+ return 0;
+ }
+
+ return 1;
+}
+
+static int eeprom_erase_all(void)
+{
+ ulong timeout = 100000;
+
+ if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
+ printf("%s: Busy at start\n", __func__);
+ return 0;
+ }
+
+ smc911x_reg_write(E2P_CMD, (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_ERAL_));
+
+ while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) &
E2P_CMD_EPC_BUSY_)) {
+ udelay(10);
+ timeout--;
+ }
+
+ if (timeout == 0) {
+ printf("Timeout[4]\n");
+ return 0;
+ }
+
+ return 1;
+}
+
+static int eeprom_reload(void)
+{
+ ulong timeout = 100000;
+
+ if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY_) {
+ printf("%s: Busy at start\n", __func__);
+ return -1;
+ }
+ smc911x_reg_write(E2P_CMD,
+ (E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_RELOAD_));
+
+ while ((timeout > 0) && (smc911x_reg_read(E2P_CMD) &
E2P_CMD_EPC_BUSY_)) {
+ udelay(10);
+ timeout--;
+ }
+
+ if (timeout == 0)
+ return 0;
+
+ return 1;
+}
+
+static int eeprom_save_mac_address(ulong dwHi16, ulong dwLo32)
+{
+ int result = 0;
+
+ debug("%s: dwHI: 0x%08lx dwLO: %08lx, \n", __func__, dwHi16, dwLo32);
+
+ if (!eeprom_enable_erase_and_write())
+ goto DONE;
+ if (!eeprom_erase_all())
+ goto DONE;
+ if (!eeprom_write_location(0, 0xA5))
+ goto DONE;
+ if (!eeprom_write_location(1, LOBYTE(LOWORD(dwLo32))))
+ goto DONE;
+ if (!eeprom_write_location(2, HIBYTE(LOWORD(dwLo32))))
+ goto DONE;
+ if (!eeprom_write_location(3, LOBYTE(HIWORD(dwLo32))))
+ goto DONE;
+ if (!eeprom_write_location(4, HIBYTE(HIWORD(dwLo32))))
+ goto DONE;
+ if (!eeprom_write_location(5, LOBYTE(LOWORD(dwHi16))))
+ goto DONE;
+ if (!eeprom_write_location(6, HIBYTE(LOWORD(dwHi16))))
+ goto DONE;
+ if (!eeprom_disable_erase_and_write())
+ goto DONE;
+
+ result = 1;
+
+DONE:
+ return result;
+}
+
+static int do_eeprom_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ unchar data = 0, index = 0;
+ ulong gpio_old_val;
+
+ gpio_old_val = eeprom_enable_access();
+
+ printf("EEPROM content: \n");
+ for (index = 0; index < 8; index++) {
+ if (eeprom_read_location(index, &data))
+ printf("%02x ", data);
+ else
+ printf("FAILED");
+ }
+
+ eeprom_disable_access(gpio_old_val);
+ printf("\n");
+
+ return 0;
+}
+
+static int do_eeprom_erase_all(cmd_tbl_t *cmdtp, int flag, int argc, char
*argv[])
+{
+ eeprom_erase_all();
+
+ return 0;
+}
+
+static int do_eeprom_save_mac(cmd_tbl_t *cmdtp, int flag, int argc, char
*argv[])
+{
+ ulong hi16, lo32;
+ unchar ethaddr[6], i;
+ ulong gpio;
+ char *tmp, *end;
+
+ tmp = argv[1];
+ for (i = 0; i < 6; i++) {
+ ethaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
+ if (tmp)
+ tmp = (*end) ? end + 1 : end;
+ }
+
+ hi16 = (ethaddr[5] << 8) | (ethaddr[4]);
+ lo32 = (ethaddr[3] << 24) | (ethaddr[2] << 16) |
+ (ethaddr[1] << 8) | (ethaddr[0]);
+
+ gpio = eeprom_enable_access();
+
+ eeprom_save_mac_address(hi16, lo32);
+
+ eeprom_reload();
+
+ /* Check new values */
+ if (eeprom_is_mac_address_loaded()) {
+ ulong mac_hi16, mac_lo32;
+
+ mac_hi16 = get_mac_reg(MAC_ADDRH);
+ mac_lo32 = get_mac_reg(MAC_ADDRL);
+ printf("New MAC address: %lx, %lx\n", mac_hi16, mac_lo32);
+ } else {
+ printf("Address is not reloaded \n");
+ }
+ eeprom_disable_access(gpio);
+
+ return 0;
+}
+
+U_BOOT_CMD(smcee, 1, 0, do_eeprom_erase_all,
+ "smcee - Erase content of SMC EEPROM\n",);
+
+U_BOOT_CMD(smced, 1, 0, do_eeprom_dump,
+ "smced - Dump content of SMC EEPROM\n",);
+
+U_BOOT_CMD(smcew, 2, 0, do_eeprom_save_mac,
+ "smcew - Write MAC address to SMC EEPROM\n",
+ "aa:bb:cc:dd:ee:ff new mac address\n");
diff --git a/board/micronas/vct/top.c b/board/micronas/vct/top.c
new file mode 100644
index 0000000..0923954
--- /dev/null
+++ b/board/micronas/vct/top.c
@@ -0,0 +1,289 @@
+/*
+ * (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+ *
+ * Copyright (C) 2006 Micronas GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include "vct.h"
+
+typedef union _TOP_PINMUX_t
+{
+ u32 reg;
+ struct {
+ u32 res : 24; /* reserved */
+ u32 drive : 2; /* Driver strength */
+ u32 slew : 1; /* Slew rate */
+ u32 strig : 1; /* Schmitt trigger input*/
+ u32 pu_pd : 2; /* Pull up/ pull down */
+ u32 funsel : 2; /* Pin function */
+ } Bits;
+} TOP_PINMUX_t;
+
+#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
+
+static TOP_PINMUX_t top_read_pin(int pin)
+{
+ TOP_PINMUX_t reg;
+
+ switch (pin) {
+ case 2:
+ case 3:
+ case 6:
+ case 9:
+ reg.reg = 0xdeadbeef;
+ break;
+ case 4:
+ reg.reg = reg_read(FWSRAM_TOP_SCL_CFG(FWSRAM_BASE));
+ break;
+ case 5:
+ reg.reg = reg_read(FWSRAM_TOP_SDA_CFG(FWSRAM_BASE));
+ break;
+ case 7:
+ reg.reg = reg_read(FWSRAM_TOP_TDO_CFG(FWSRAM_BASE));
+ break;
+ case 8:
+ reg.reg = reg_read(FWSRAM_TOP_GPIO2_0_CFG(FWSRAM_BASE));
+ break;
+ case 10:
+ case 11:
+ case 12:
+ case 13:
+ case 14:
+ case 15:
+ case 16:
+ reg.reg = reg_read(FWSRAM_BASE + FWSRAM_TOP_GPIO2_1_CFG_OFFS +
+ ((pin - 10) * 4));
+ break;
+ default:
+ reg.reg = reg_read(TOP_BASE + (pin * 4));
+ break;
+ }
+
+ return reg;
+}
+
+static void top_write_pin(int pin, TOP_PINMUX_t reg)
+{
+
+ switch (pin) {
+ case 4:
+ reg_write(FWSRAM_TOP_SCL_CFG(FWSRAM_BASE), reg.reg);
+ break;
+ case 5:
+ reg_write(FWSRAM_TOP_SDA_CFG(FWSRAM_BASE), reg.reg);
+ break;
+ case 7:
+ reg_write(FWSRAM_TOP_TDO_CFG(FWSRAM_BASE), reg.reg);
+ break;
+ case 8:
+ reg_write(FWSRAM_TOP_GPIO2_0_CFG(FWSRAM_BASE), reg.reg);
+ break;
+ case 10:
+ case 11:
+ case 12:
+ case 13:
+ case 14:
+ case 15:
+ case 16:
+ reg_write(FWSRAM_BASE + FWSRAM_TOP_GPIO2_1_CFG_OFFS +
+ ((pin - 10) * 4), reg.reg);
+ break;
+ default:
+ reg_write(TOP_BASE + (pin * 4), reg.reg);
+ break;
+ }
+}
+
+int top_set_pin(int pin, int func)
+{
+ TOP_PINMUX_t reg;
+
+ /* check global range */
+ if ((pin < 0) || (pin > 170) || (func < 0) || (func > 3))
+ return -1; /* pin number or function out of valid range */
+
+ /* check undefined values; */
+ if ((pin == 2) || (pin == 3) || (pin == 6) || (pin == 9))
+ return -1; /* pin number out of valid range */
+
+ reg = top_read_pin(pin);
+ reg.Bits.funsel = func;
+ top_write_pin(pin, reg);
+
+ return 0;
+}
+
+#endif
+
+#if defined(CONFIG_VCT_PLATINUMAVC)
+
+int top_set_pin(int pin, int func)
+{
+ TOP_PINMUX_t reg;
+
+ /* check global range */
+ if ((pin < 0) || (pin > 158))
+ return -1; /* pin number or function out of valid range */
+
+ reg.reg = reg_read(TOP_BASE + (pin * 4));
+ reg.Bits.funsel = func;
+ reg_write(TOP_BASE + (pin * 4), reg.reg);
+
+ return 0;
+}
+
+#endif
+
+void vct_pin_mux_initialize(void)
+{
+#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
+ top_set_pin(34, 01); /* EBI_CS0 */
+ top_set_pin(33, 01); /* EBI_CS1 */
+ top_set_pin(32, 01); /* EBI_CS2 */
+ top_set_pin(100, 02); /* EBI_CS3 */
+ top_set_pin(101, 02); /* EBI_CS4 */
+ top_set_pin(102, 02); /* EBI_CS5 */
+ top_set_pin(103, 02); /* EBI_CS6 */
+ top_set_pin(104, 02); /* EBI_CS7 top_set_pin(104,03); EBI_GENIO3
*/
+ top_set_pin(35, 01); /* EBI_ALE */
+ top_set_pin(36, 01); /* EBI_ADDR15 */
+ top_set_pin(37, 01); /* EBI_ADDR14 top_set_pin(78,03); EBI_ADDR14
*/
+ top_set_pin(38, 01); /* EBI_ADDR13 */
+ top_set_pin(39, 01); /* EBI_ADDR12 */
+ top_set_pin(40, 01); /* EBI_ADDR11 */
+ top_set_pin(41, 01); /* EBI_ADDR10 */
+ top_set_pin(42, 01); /* EBI_ADDR9 */
+ top_set_pin(43, 01); /* EBI_ADDR8 */
+ top_set_pin(44, 01); /* EBI_ADDR7 */
+ top_set_pin(45, 01); /* EBI_ADDR6 */
+ top_set_pin(46, 01); /* EBI_ADDR5 */
+ top_set_pin(47, 01); /* EBI_ADDR4 */
+ top_set_pin(48, 01); /* EBI_ADDR3 */
+ top_set_pin(49, 01); /* EBI_ADDR2 */
+ top_set_pin(50, 01); /* EBI_ADDR1 */
+ top_set_pin(51, 01); /* EBI_ADDR0 */
+ top_set_pin(52, 01); /* EBI_DIR */
+ top_set_pin(53, 01); /* EBI_DAT15 top_set_pin(81,01); EBI_DAT15 */
+ top_set_pin(54, 01); /* EBI_DAT14 top_set_pin(82,01); EBI_DAT14 */
+ top_set_pin(55, 01); /* EBI_DAT13 top_set_pin(83,01); EBI_DAT13 */
+ top_set_pin(56, 01); /* EBI_DAT12 top_set_pin(84,01); EBI_DAT12 */
+ top_set_pin(57, 01); /* EBI_DAT11 top_set_pin(85,01); EBI_DAT11 */
+ top_set_pin(58, 01); /* EBI_DAT10 top_set_pin(86,01); EBI_DAT10 */
+ top_set_pin(59, 01); /* EBI_DAT9 top_set_pin(87,01); EBI_DAT9 */
+ top_set_pin(60, 01); /* EBI_DAT8 top_set_pin(88,01); EBI_DAT8 */
+ top_set_pin(61, 01); /* EBI_DAT7 */
+ top_set_pin(62, 01); /* EBI_DAT6 */
+ top_set_pin(63, 01); /* EBI_DAT5 */
+ top_set_pin(64, 01); /* EBI_DAT4 */
+ top_set_pin(65, 01); /* EBI_DAT3 */
+ top_set_pin(66, 01); /* EBI_DAT2 */
+ top_set_pin(67, 01); /* EBI_DAT1 */
+ top_set_pin(68, 01); /* EBI_DAT0 */
+ top_set_pin(69, 01); /* EBI_IORD */
+ top_set_pin(70, 01); /* EBI_IOWR */
+ top_set_pin(71, 01); /* EBI_WE */
+ top_set_pin(72, 01); /* EBI_OE */
+ top_set_pin(73, 01); /* EBI_IORDY */
+ top_set_pin(95, 02); /* EBI_EBI_DMACK*/
+ top_set_pin(112, 02); /* EBI_IRQ0 */
+ top_set_pin(111, 02); /* EBI_IRQ1 top_set_pin(111,03); EBI_DMARQ
*/
+ top_set_pin(107, 02); /* EBI_IRQ2 */
+ top_set_pin(108, 02); /* EBI_IRQ3 */
+ top_set_pin(30, 01); /* EBI_GENIO1 top_set_pin(99,03); EBI_GENIO1
*/
+ top_set_pin(31, 01); /* EBI_GENIO2 top_set_pin(98,03); EBI_GENIO2
*/
+ top_set_pin(105, 02); /* EBI_GENIO3 top_set_pin(104,03); EBI_GENIO3
*/
+ top_set_pin(106, 02); /* EBI_GENIO4 top_set_pin(144,02); EBI_GENIO4
*/
+ top_set_pin(109, 02); /* EBI_GENIO5 top_set_pin(142,02); EBI_GENIO5
*/
+ top_set_pin(110, 02); /* EBI_BURST_CLK */
+#endif
+
+#if defined(CONFIG_VCT_PLATINUMAVC)
+ top_set_pin(19, 01); /* EBI_CS0 */
+ top_set_pin(18, 01); /* EBI_CS1 */
+ top_set_pin(17, 01); /* EBI_CS2 */
+ top_set_pin(92, 02); /* EBI_CS3 */
+ top_set_pin(93, 02); /* EBI_CS4 */
+ top_set_pin(95, 02); /* EBI_CS6 */
+ top_set_pin(96, 02); /* EBI_CS7 top_set_pin(104,03); EBI_GENIO3
*/
+ top_set_pin(20, 01); /* EBI_ALE */
+ top_set_pin(21, 01); /* EBI_ADDR15 */
+ top_set_pin(22, 01); /* EBI_ADDR14 top_set_pin(78,03); EBI_ADDR14
*/
+ top_set_pin(23, 01); /* EBI_ADDR13 */
+ top_set_pin(24, 01); /* EBI_ADDR12 */
+ top_set_pin(25, 01); /* EBI_ADDR11 */
+ top_set_pin(26, 01); /* EBI_ADDR10 */
+ top_set_pin(27, 01); /* EBI_ADDR9 */
+ top_set_pin(28, 01); /* EBI_ADDR8 */
+ top_set_pin(29, 01); /* EBI_ADDR7 */
+ top_set_pin(30, 01); /* EBI_ADDR6 */
+ top_set_pin(31, 01); /* EBI_ADDR5 */
+ top_set_pin(32, 01); /* EBI_ADDR4 */
+ top_set_pin(33, 01); /* EBI_ADDR3 */
+ top_set_pin(34, 01); /* EBI_ADDR2 */
+ top_set_pin(35, 01); /* EBI_ADDR1 */
+ top_set_pin(36, 01); /* EBI_ADDR0 */
+ top_set_pin(37, 01); /* EBI_DIR */
+ top_set_pin(38, 01); /* EBI_DAT15 top_set_pin(81,01); EBI_DAT15 */
+ top_set_pin(39, 01); /* EBI_DAT14 top_set_pin(82,01); EBI_DAT14 */
+ top_set_pin(40, 01); /* EBI_DAT13 top_set_pin(83,01); EBI_DAT13 */
+ top_set_pin(41, 01); /* EBI_DAT12 top_set_pin(84,01); EBI_DAT12 */
+ top_set_pin(42, 01); /* EBI_DAT11 top_set_pin(85,01); EBI_DAT11 */
+ top_set_pin(43, 01); /* EBI_DAT10 top_set_pin(86,01); EBI_DAT10 */
+ top_set_pin(44, 01); /* EBI_DAT9 top_set_pin(87,01); EBI_DAT9 */
+ top_set_pin(45, 01); /* EBI_DAT8 top_set_pin(88,01); EBI_DAT8 */
+ top_set_pin(46, 01); /* EBI_DAT7 */
+ top_set_pin(47, 01); /* EBI_DAT6 */
+ top_set_pin(48, 01); /* EBI_DAT5 */
+ top_set_pin(49, 01); /* EBI_DAT4 */
+ top_set_pin(50, 01); /* EBI_DAT3 */
+ top_set_pin(51, 01); /* EBI_DAT2 */
+ top_set_pin(52, 01); /* EBI_DAT1 */
+ top_set_pin(53, 01); /* EBI_DAT0 */
+ top_set_pin(54, 01); /* EBI_IORD */
+ top_set_pin(55, 01); /* EBI_IOWR */
+ top_set_pin(56, 01); /* EBI_WE */
+ top_set_pin(57, 01); /* EBI_OE */
+ top_set_pin(58, 01); /* EBI_IORDY */
+ top_set_pin(87, 02); /* EBI_EBI_DMACK*/
+ top_set_pin(106, 02); /* EBI_IRQ0 */
+ top_set_pin(105, 02); /* EBI_IRQ1 top_set_pin(111,03); EBI_DMARQ
*/
+ top_set_pin(101, 02); /* EBI_IRQ2 */
+ top_set_pin(102, 02); /* EBI_IRQ3 */
+ top_set_pin(15, 01); /* EBI_GENIO1 top_set_pin(99,03); EBI_GENIO1
*/
+ top_set_pin(16, 01); /* EBI_GENIO2 top_set_pin(98,03); EBI_GENIO2
*/
+ top_set_pin(99, 02); /* EBI_GENIO3 top_set_pin(104,03); EBI_GENIO3
*/
+ top_set_pin(100, 02); /* EBI_GENIO4 top_set_pin(144,02); EBI_GENIO4
*/
+ top_set_pin(103, 02); /* EBI_GENIO5 top_set_pin(142,02); EBI_GENIO5
*/
+ top_set_pin(104, 02); /* EBI_BURST_CLK */
+#endif
+
+ /* I2C: Configure I2C-2 as GPIO to enable soft-i2c */
+ top_set_pin(0, 2); /* SCL2 on GPIO 11 */
+ top_set_pin(1, 2); /* SDA2 on GPIO 10 */
+
+ /* UART pins */
+#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
+ top_set_pin(141, 1);
+ top_set_pin(143, 1);
+#endif
+#if defined(CONFIG_VCT_PLATINUMAVC)
+ top_set_pin(107, 1);
+ top_set_pin(109, 1);
+#endif
+}
diff --git a/board/micronas/vct/u-boot.lds b/board/micronas/vct/u-boot.lds
new file mode 100644
index 0000000..da9e605
--- /dev/null
+++ b/board/micronas/vct/u-boot.lds
@@ -0,0 +1,71 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk Engineering, <w...@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradlittlemips")
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = .;
+ _gp = ALIGN(16) + 0x7ff0;
+
+ .got : {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ }
+
+ . = ALIGN(4);
+ .sdata : { *(.sdata) }
+
+ . = ALIGN(4);
+ .u_boot_cmd : {
+ __u_boot_cmd_start = .;
+ *(.u_boot_cmd)
+ __u_boot_cmd_end = .;
+ }
+
+ . = ALIGN(4);
+ uboot_end_data = .;
+ num_got_entries = (__got_end - __got_start) >> 2;
+
+ . = ALIGN(4);
+ .sbss (NOLOAD) : { *(.sbss) }
+ . = ALIGN(4);
+ .bss (NOLOAD) : { *(.bss) }
+ uboot_end = .;
+}
diff --git a/board/micronas/vct/vct.c b/board/micronas/vct/vct.c
new file mode 100644
index 0000000..61af14a
--- /dev/null
+++ b/board/micronas/vct/vct.c
@@ -0,0 +1,117 @@
+/*
+ * (C) Copyright 2008 Stefan Roese <s...@denx.de>, DENX Software Engineering
+ *
+ * Copyright (C) 2006 Micronas GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/mipsregs.h>
+#include "vct.h"
+
+#if defined(CONFIG_VCT_PREMIUM)
+#define BOARD_NAME "PremiumD"
+#elif defined(CONFIG_VCT_PLATINUM)
+#define BOARD_NAME "PlatinumD"
+#elif defined(CONFIG_VCT_PLATINUMAVC)
+#define BOARD_NAME "PlatinumAVC"
+#else
+#error "vct: No board variant defined!"
+#endif
+
+#if defined(CONFIG_VCT_ONENAND)
+#define BOARD_NAME_ADD " OneNAND"
+#else
+#define BOARD_NAME_ADD " NOR"
+#endif
+
+int board_early_init_f(void)
+{
+ /*
+ * First initialize the PIN mulitplexing
+ */
+ vct_pin_mux_initialize();
+
+ /*
+ * Init the EBI very early so that FLASH can be accessed
+ */
+ ebi_initialize();
+
+ return 0;
+}
+
+void _machine_restart(void)
+{
+ reg_write(DCGU_EN_WDT_RESET(DCGU_BASE), DCGU_MAGIC_WDT);
+ reg_write(WDT_TORR(WDT_BASE), 0x00);
+ reg_write(WDT_CR(WDT_BASE), 0x1D);
+
+ /*
+ * Now wait for the watchdog to trigger the reset
+ */
+ udelay(1000000);
+}
+
+/*
+ * SDRAM is already configured by the bootstrap code, only return the
+ * auto-detected size here
+ */
+phys_size_t initdram(int board_type)
+{
+ return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_MBYTES_SDRAM << 20);
+}
+
+int checkboard(void)
+{
+ u32 config0 = read_c0_prid();
+ char *s = getenv("serial#");
+
+ if ((config0 & 0xff0000) == PRID_COMP_LEGACY
+ && (config0 & 0xff00) == PRID_IMP_LX4280) {
+ puts("Board: MDED \n");
+ printf("CPU: LX4280 id: 0x%02x, rev: 0x%02x\n",
+ (config0 >> 8) & 0xFF, config0 & 0xFF);
+ } else if ((config0 & 0xff0000) == PRID_COMP_MIPS
+ && (config0 & 0xff00) == PRID_IMP_VGC) {
+ u32 jedec_id = *((u32 *) 0xBEBC71A0);
+ if ((((jedec_id) >> 12) & 0xFF) == 0x40) {
+ puts("Board: VGCA \n");
+ } else if ((((jedec_id) >> 12) & 0xFF) == 0x48
+ || (((jedec_id) >> 12) & 0xFF) == 0x49) {
+ puts("Board: VGCB \n");
+ }
+ printf("CPU: MIPS 4K id: 0x%02x, rev: 0x%02x\n",
+ (config0 >> 8) & 0xFF, config0 & 0xFF);
+ } else if (config0 == 0x19378) {
+ printf("CPU: MIPS 24K id: 0x%02x, rev: 0x%02x\n",
+ (config0 >> 8) & 0xFF, config0 & 0xFF);
+ } else {
+ printf("Unsupported cpu %d, proc_id=0x%x\n", config0 >> 24,
+ config0);
+ }
+
+ printf("Board: Micronas VCT " BOARD_NAME BOARD_NAME_ADD);
+ if (s != NULL) {
+ puts(", serial# ");
+ puts(s);
+ }
+ putc('\n');
+
+ return 0;
+}
--
1.6.1
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