This fixes the initialization of the SDRAM_CODT register in the ppc4xx DDR2
initialization code. It also removes use of the
SDRAM_CODT_FEEDBACK_RCV_SINGLE_END
and SDRAM_CODT_FEEDBACK_DRV_SINGLE_END #define's since they are reserved bits.
Signed-off-by: Carolyn Smith <carolyn.sm...@tektronix.com>
---
diff -uprN old/cpu/ppc4xx/44x_spd_ddr2.c new/cpu/ppc4xx/44x_spd_ddr2.c
--- old/cpu/ppc4xx/44x_spd_ddr2.c 2009-02-10 09:12:56.000000000 -0800
+++ new/cpu/ppc4xx/44x_spd_ddr2.c 2009-02-10 09:13:34.000000000 -0800
@@ -1101,11 +1101,11 @@ static void program_codt(unsigned long *
* Set the SDRAM Controller On Die Termination Register
*-----------------------------------------------------------------*/
mfsdram(SDRAM_CODT, codt);
- codt |= (SDRAM_CODT_IO_NMODE
- & (~SDRAM_CODT_DQS_SINGLE_END
- & ~SDRAM_CODT_CKSE_SINGLE_END
- & ~SDRAM_CODT_FEEBBACK_RCV_SINGLE_END
- & ~SDRAM_CODT_FEEBBACK_DRV_SINGLE_END));
+
+ codt |= SDRAM_CODT_IO_NMODE;
+
+ codt &= ~(SDRAM_CODT_DQS_SINGLE_END | SDRAM_CODT_CKSE_SINGLE_END);
+
for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
if (dimm_populated[dimm_num] != SDRAM_NONE) {
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