>-----Original Message----- >From: Eric Nelson [mailto:eric.nel...@boundarydevices.com] >Sent: Monday, February 18, 2013 3:24 AM >To: u-boot@lists.denx.de >Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496; >troy.ki...@boundarydevices.com; Eric Nelson >Subject: [PATCH 2/6] i.MX6: consolidate pad names for multi-CPU boards > >Rename all i.MX6 pad declarations to MX6_PAD_x, so a board >may support either i.MX6Quad/Dual (MX6Q) or i.MX6Dual-Lite/Solo >(MX6DL) by including the proper header. > >Boards mx6qarm2, mx6qsabreauto, mx6qsabrelite, and mx6qsabresd >only support MX6Q, so they include mx6q_pins.h. > >Signed-off-by: Eric Nelson <eric.nel...@boundarydevices.com> >--- > arch/arm/include/asm/arch-mx6/mx6-pins.h | 31 + > arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 190 +-- > arch/arm/include/asm/arch-mx6/mx6q_pins.h | 1671 >+++++++++++++++++++++++++ > arch/arm/include/asm/arch-mx6/mx6x_pins.h | 1671 ------------------------- > board/freescale/mx6qarm2/mx6qarm2.c | 78 +- > board/freescale/mx6qsabreauto/mx6qsabreauto.c | 60 +- > board/freescale/mx6qsabrelite/mx6qsabrelite.c | 190 +-- > board/freescale/mx6qsabresd/mx6qsabresd.c | 102 +- > 8 files changed, 2012 insertions(+), 1981 deletions(-) > create mode 100644 arch/arm/include/asm/arch-mx6/mx6-pins.h > create mode 100644 arch/arm/include/asm/arch-mx6/mx6q_pins.h > delete mode 100644 arch/arm/include/asm/arch-mx6/mx6x_pins.h > >diff --git a/arch/arm/include/asm/arch-mx6/mx6-pins.h >b/arch/arm/include/asm/arch-mx6/mx6-pins.h >new file mode 100644 >index 0000000..4011268 >--- /dev/null >+++ b/arch/arm/include/asm/arch-mx6/mx6-pins.h >@@ -0,0 +1,31 @@ >+/* >+ * Copyright (C) 2012 Boundary Devices Inc. >+ * >+ * This program is free software; you can redistribute it and/or modify >+ * it under the terms of the GNU General Public License as published by >+ * the Free Software Foundation; either version 2 of the License, or >+ * (at your option) any later version. >+ >+ * This program is distributed in the hope that it will be useful, >+ * but WITHOUT ANY WARRANTY; without even the implied warranty of >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >+ * GNU General Public License for more details. >+ >+ * You should have received a copy of the GNU General Public License along >+ * with this program; if not, write to the Free Software Foundation, Inc., >+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. >+ */ >+#ifndef __ASM_ARCH_MX6_PINS_H__ >+#define __ASM_ARCH_MX6_PINS_H__ >+ >+#ifdef CONFIG_MX6Q >+#include "mx6q_pins.h" >+#else >+#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) >+#include "mx6dl_pins.h" >+#else >+#error "Please select cpu" >+#endif /* CONFIG_MX6DL or CONFIG_MX6S */ >+#endif /* CONFIG_MX6Q */ >+ >+#endif /*__ASM_ARCH_MX6_PINS_H__ */ >diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h >b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h >index 79e2c4f..0395357 100644 >--- a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h >+++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h >@@ -50,100 +50,100 @@ > #define NO_MUX_I 0 > #define NO_PAD_I 0 > enum { >- MX6DL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK = >IOMUX_PAD(0x03B0, 0x009C, 0, 0x0000, 0, PAD_CTL_DSE_120ohm), >- MX6DL_PAD_DI0_PIN15__IPU1_DI0_PIN15 = IOMUX_PAD(0x03B4, >0x00A0, 0, 0x0000, 0, PAD_CTL_DSE_120ohm), >- MX6DL_PAD_DI0_PIN2__IPU1_DI0_PIN2 = IOMUX_PAD(0x03B8, >0x00A4, 0, 0x0000, 0, PAD_CTL_DSE_120ohm), >- MX6DL_PAD_DI0_PIN3__IPU1_DI0_PIN3 = IOMUX_PAD(0x03BC, >0x00A8, 0, 0x0000, 0, PAD_CTL_DSE_120ohm), >- MX6DL_PAD_DI0_PIN4__GPIO_4_20 = IOMUX_PAD(0x03C0, >0x00AC, 5, 0x0000, 0, PAD_CTL_DSE_120ohm),
[...] >diff --git a/board/freescale/mx6qarm2/mx6qarm2.c >b/board/freescale/mx6qarm2/mx6qarm2.c >index ee20d4f..ff7f5e8 100644 >--- a/board/freescale/mx6qarm2/mx6qarm2.c >+++ b/board/freescale/mx6qarm2/mx6qarm2.c >@@ -23,7 +23,7 @@ > #include <common.h> > #include <asm/io.h> > #include <asm/arch/imx-regs.h> >-#include <asm/arch/mx6x_pins.h> >+#include <asm/arch/mx6q_pins.h> Since you have defined mx6-pins.h, why not just include the mx6-pins.h? If not using mx6-pins.h, then what's the purpose of it? > #include <asm/arch/clock.h> > #include <asm/errno.h> > #include <asm/gpio.h> >@@ -55,53 +55,53 @@ int dram_init(void) > } > > iomux_v3_cfg_t const uart4_pads[] = { >- MX6Q_PAD_KEY_COL0__UART4_TXD | >MUX_PAD_CTRL(UART_PAD_CTRL), >- MX6Q_PAD_KEY_ROW0__UART4_RXD | >MUX_PAD_CTRL(UART_PAD_CTRL), >+ MX6_PAD_KEY_COL0__UART4_TXD | >MUX_PAD_CTRL(UART_PAD_CTRL), >+ MX6_PAD_KEY_ROW0__UART4_RXD | >MUX_PAD_CTRL(UART_PAD_CTRL), > }; > > iomux_v3_cfg_t const usdhc3_pads[] = { >- MX6Q_PAD_SD3_CLK__USDHC3_CLK | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD3_CMD__USDHC3_CMD | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_NANDF_CS0__GPIO_6_11 | >MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ >+ MX6_PAD_SD3_CLK__USDHC3_CLK | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD3_CMD__USDHC3_CMD | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD3_DAT0__USDHC3_DAT0 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD3_DAT1__USDHC3_DAT1 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD3_DAT2__USDHC3_DAT2 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD3_DAT3__USDHC3_DAT3 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD3_DAT4__USDHC3_DAT4 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD3_DAT5__USDHC3_DAT5 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD3_DAT6__USDHC3_DAT6 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD3_DAT7__USDHC3_DAT7 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_NANDF_CS0__GPIO_6_11 | >MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ > }; > > iomux_v3_cfg_t const usdhc4_pads[] = { >- MX6Q_PAD_SD4_CLK__USDHC4_CLK | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD4_CMD__USDHC4_CMD | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >- MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_CLK__USDHC4_CLK | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_CMD__USDHC4_CMD | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_DAT0__USDHC4_DAT0 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_DAT1__USDHC4_DAT1 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_DAT2__USDHC4_DAT2 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_DAT3__USDHC4_DAT3 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_DAT4__USDHC4_DAT4 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_DAT5__USDHC4_DAT5 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_DAT6__USDHC4_DAT6 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), >+ MX6_PAD_SD4_DAT7__USDHC4_DAT7 | >MUX_PAD_CTRL(USDHC_PAD_CTRL), > }; > > iomux_v3_cfg_t const enet_pads[] = { >- MX6Q_PAD_KEY_COL1__ENET_MDIO | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_KEY_COL2__ENET_MDC | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >- MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_KEY_COL1__ENET_MDIO | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_KEY_COL2__ENET_MDC | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_TXC__ENET_RGMII_TXC | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_TD0__ENET_RGMII_TD0 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_TD1__ENET_RGMII_TD1 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_TD2__ENET_RGMII_TD2 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_TD3__ENET_RGMII_TD3 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_RXC__ENET_RGMII_RXC | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_RD0__ENET_RGMII_RD0 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_RD1__ENET_RGMII_RD1 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_RD2__ENET_RGMII_RD2 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_RD3__ENET_RGMII_RD3 | >MUX_PAD_CTRL(ENET_PAD_CTRL), >+ MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | >MUX_PAD_CTRL(ENET_PAD_CTRL), > }; > > >diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c >b/board/freescale/mx6qsabreauto/mx6qsabreauto.c >index 9e3700e..91cc007 100644 >--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c >+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c >@@ -22,7 +22,7 @@ > #include <asm/arch/clock.h> > #include <asm/arch/imx-regs.h> > #include <asm/arch/iomux.h> >-#include <asm/arch/mx6x_pins.h> >+#include <asm/arch/mx6q_pins.h> Ditto, for the left part. > #include <asm/errno.h> > #include <asm/gpio.h> > #include <asm/imx-common/iomux-v3.h> >@@ -54,26 +54,26 @@ int dram_init(void) > } > [...] _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot