Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that any NAND controller
driver could use it when a 16-bit NAND is deployed.
drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
other NAND drivers could reuse the same symbol.
Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
---
README | 6 +++---
drivers/mtd/nand/ndfc.c | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/README b/README
index d8cb394..1e265c9 100644
--- a/README
+++ b/README
@@ -3713,9 +3713,9 @@ Low Level (hardware related) configuration options:
- CONFIG_SYS_SRIOn_MEM_SIZE:
Size of SRIO port 'n' memory region
-- CONFIG_SYS_NDFC_16
- Defined to tell the NDFC that the NAND chip is using a
- 16 bit bus.
+- CONFIG_SYS_NAND_BUSWIDTH_16BIT
+ Defined to tell the NAND controller that the NAND chip is using
+ a 16 bit bus.
- CONFIG_SYS_NDFC_EBC0_CFG
Sets the EBC0_CFG register for the NDFC. If not defined
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index 6ebbb5e..213d2c9 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -156,7 +156,7 @@ static uint8_t ndfc_read_byte(struct mtd_info *mtd)
struct nand_chip *chip = mtd->priv;
-#ifdef CONFIG_SYS_NDFC_16BIT
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
return (uint8_t) readw(chip->IO_ADDR_R);
#else
return readb(chip->IO_ADDR_R);
@@ -218,7 +218,7 @@ int board_nand_init(struct nand_chip *nand)
nand->ecc.bytes = 3;
nand->select_chip = ndfc_select_chip;
-#ifdef CONFIG_SYS_NDFC_16BIT
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
nand->options |= NAND_BUSWIDTH_16;
#endif
--
1.7.9.5
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