I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms.
The I2C4 and I2C5 base addresses were however not defined; do this
here.
Signed-off-by: Lubomir Popov <lpo...@mm-sol.com>
---
Changes since V3:
Added detailed commit messages.
Changes since V2:
Separate patches consolidated into a series.
Changes since V1:
Fixed line wrap issues.
arch/arm/include/asm/arch-omap5/cpu.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap5/cpu.h
b/arch/arm/include/asm/arch-omap5/cpu.h
index 5e62013..044ab55 100644
--- a/arch/arm/include/asm/arch-omap5/cpu.h
+++ b/arch/arm/include/asm/arch-omap5/cpu.h
@@ -142,6 +142,8 @@ struct watchdog {
#define I2C_BASE1 (OMAP54XX_L4_PER_BASE + 0x70000)
#define I2C_BASE2 (OMAP54XX_L4_PER_BASE + 0x72000)
#define I2C_BASE3 (OMAP54XX_L4_PER_BASE + 0x60000)
+#define I2C_BASE4 (OMAP54XX_L4_PER_BASE + 0x7A000)
+#define I2C_BASE5 (OMAP54XX_L4_PER_BASE + 0x7C000)
/* MUSB base */
#define MUSB_BASE (OMAP54XX_L4_CORE_BASE + 0xAB000)
--
1.7.9.5
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