Augment the MX5 clock code with function to enable and configure
NFC clock. This is necessary to get NFC working on MX5.
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Albert ARIBAUD <albert.u.b...@aribaud.net>
Cc: Benoît Thébaudeau <benoit.thebaud...@advansee.com>
Cc: Fabio Estevam <fabio.este...@freescale.com>
Cc: Scott Wood <scottw...@freescale.com>
Cc: Stefano Babic <sba...@denx.de>
Cc: Tom Rini <tr...@ti.com>
---
arch/arm/cpu/armv7/mx5/clock.c | 14 ++++++++++++--
arch/arm/include/asm/arch-mx5/clock.h | 1 +
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index 76c2c52..431756e 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -739,10 +739,11 @@ static int config_core_clk(u32 ref, u32 freq)
static int config_nfc_clk(u32 nfc_clk)
{
u32 parent_rate = get_emi_slow_clk();
- u32 div = parent_rate / nfc_clk;
+ u32 div;
- if (nfc_clk <= 0)
+ if (nfc_clk == 0)
return -EINVAL;
+ div = parent_rate / nfc_clk;
if (div == 0)
div++;
if (parent_rate / div > NFC_CLK_MAX)
@@ -755,6 +756,15 @@ static int config_nfc_clk(u32 nfc_clk)
return 0;
}
+void enable_nfc_clk(unsigned char enable)
+{
+ unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
+
+ clrsetbits_le32(&mxc_ccm->CCGR5,
+ MXC_CCM_CCGR5_EMI_ENFC(MXC_CCM_CCGR_CG_MASK),
+ MXC_CCM_CCGR5_EMI_ENFC(cg));
+}
+
/* Config main_bus_clock for periphs */
static int config_periph_clk(u32 ref, u32 freq)
{
diff --git a/arch/arm/include/asm/arch-mx5/clock.h
b/arch/arm/include/asm/arch-mx5/clock.h
index 9cdfb48..6910192 100644
--- a/arch/arm/include/asm/arch-mx5/clock.h
+++ b/arch/arm/include/asm/arch-mx5/clock.h
@@ -68,5 +68,6 @@ void set_usboh3_clk(void);
void enable_usboh3_clk(unsigned char enable);
void mxc_set_sata_internal_clock(void);
int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
+void enable_nfc_clk(unsigned char enable);
#endif /* __ASM_ARCH_CLOCK_H */
--
1.7.10.4
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