On EXYNOS4210, there are three paths for display data to be processed,
namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller
is used.
Signed-off-by: Tushar Behera <tushar.beh...@linaro.org>
---
This patch is rebased on master branch of u-boot-samsung tree.
board/samsung/origen/lowlevel_init.S | 13 +++++++++++++
board/samsung/origen/origen_setup.h | 7 +++++++
2 files changed, 20 insertions(+)
diff --git a/board/samsung/origen/lowlevel_init.S
b/board/samsung/origen/lowlevel_init.S
index be9d418..a7ea680 100644
--- a/board/samsung/origen/lowlevel_init.S
+++ b/board/samsung/origen/lowlevel_init.S
@@ -89,6 +89,7 @@ lowlevel_init:
bl uart_asm_init
bl arch_cpu_init
bl tzpc_init
+ bl display_init
pop {pc}
wakeup_reset:
@@ -96,6 +97,7 @@ wakeup_reset:
bl mem_ctrl_asm_init
bl arch_cpu_init
bl tzpc_init
+ bl display_init
exit_wakeup:
/* Load return address and jump to kernel */
@@ -355,3 +357,14 @@ uart_asm_init:
nop
nop
+/* Setting default display path to FIMD */
+display_init:
+ push {lr}
+ ldr r0, =EXYNOS4_SYSREG_BASE
+
+ /* DISPLAY_CONTROL */
+ ldr r1, =DISPLAY_CONTROL_VAL
+ ldr r2, =DISPLAY_CONTROL_OFFSET
+ str r1, [r0, r2]
+
+ pop {pc}
diff --git a/board/samsung/origen/origen_setup.h
b/board/samsung/origen/origen_setup.h
index 926a4cc..b0e1bc2 100644
--- a/board/samsung/origen/origen_setup.h
+++ b/board/samsung/origen/origen_setup.h
@@ -83,6 +83,8 @@
#define VPLL_CON0_OFFSET 0xC120
#define VPLL_CON1_OFFSET 0xC124
+#define DISPLAY_CONTROL_OFFSET 0x210
+
/* DMC: DRAM Controllor Register offsets */
#define DMC_CONCONTROL 0x00
#define DMC_MEMCONTROL 0x04
@@ -485,6 +487,11 @@
| (VPLL_MRR << 24) \
| (VPLL_MFR << 16) \
| (VPLL_K << 0))
+
+/* DISPLAY_CONTROL */
+#define FIMDBYPASS_LBLK0 0x1
+#define DISPLAY_CONTROL_VAL (FIMDBYPASS_LBLK0 << 1)
+
/*
* UART GPIO_A0/GPIO_A1 Control Register Value
* 0x2: UART Function
--
1.7.9.5
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