On 22:02 Wed 01 Apr , Tom Rix wrote: > Zoom2 is a new board from Texas Instruments and LogicPD > This is the product description > http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap34x-ii-mdp > > This patch provides a zoom2 base target by copying zoom1 and by making some > obvious changes. This target compiles but does not yet run. > > To configure, run > make omap3_zoom2_config > > Signed-off-by: Tom Rix <tom....@windriver.com> > --- > MAINTAINERS | 4 + > MAKEALL | 1 + > Makefile | 3 + > board/omap3/common/Makefile | 1 + > board/omap3/zoom2/Makefile | 49 +++++++ > board/omap3/zoom2/config.mk | 33 +++++ > board/omap3/zoom2/u-boot.lds | 63 +++++++++ > board/omap3/zoom2/zoom2.c | 79 +++++++++++ > board/omap3/zoom2/zoom2.h | 134 ++++++++++++++++++ > include/configs/omap3_zoom2.h | 311 > +++++++++++++++++++++++++++++++++++++++++ > 10 files changed, 678 insertions(+), 0 deletions(-) > create mode 100644 board/omap3/zoom2/Makefile > create mode 100644 board/omap3/zoom2/config.mk > create mode 100644 board/omap3/zoom2/u-boot.lds > create mode 100644 board/omap3/zoom2/zoom2.c > create mode 100644 board/omap3/zoom2/zoom2.h > create mode 100644 include/configs/omap3_zoom2.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index 25b28d6..f89e01a 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -610,6 +610,10 @@ Stelian Pop <stelian....@leadtechdesign.com> > at91sam9263ek ARM926EJS (AT91SAM9263 SoC) > at91sam9rlek ARM926EJS (AT91SAM9RL SoC) > > +Tom Rix <tom....@windriver.com> > + > + omap3_zoom2 ARM CORTEX-A8 (OMAP3xx SoC) > + > Stefan Roese <s...@denx.de> > > ixdpg425 xscale > diff --git a/MAKEALL b/MAKEALL > index 854f303..8d84c29 100755 > --- a/MAKEALL > +++ b/MAKEALL > @@ -561,6 +561,7 @@ LIST_ARM_CORTEX_A8=" \ > omap3_evm \ > omap3_pandora \ > omap3_zoom1 \ > + omap3_zoom2 \ > " > > ######################################################################### > diff --git a/Makefile b/Makefile > index f857641..1a3d14e 100644 > --- a/Makefile > +++ b/Makefile > @@ -2974,6 +2974,9 @@ omap3_pandora_config : unconfig > omap3_zoom1_config : unconfig > @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3 > > +omap3_zoom2_config : unconfig > + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom2 omap3 omap3 > + > ######################################################################### > ## XScale Systems > ######################################################################### > diff --git a/board/omap3/common/Makefile b/board/omap3/common/Makefile > index 7b892fa..b8a0b14 100644 > --- a/board/omap3/common/Makefile > +++ b/board/omap3/common/Makefile > @@ -33,6 +33,7 @@ COBJS-$(CONFIG_OMAP3_BEAGLE) += power.o > COBJS-$(CONFIG_OMAP3_OVERO) += power.o > COBJS-$(CONFIG_OMAP3_PANDORA) += power.o > COBJS-$(CONFIG_OMAP3_ZOOM1) += power.o > +COBJS-$(CONFIG_OMAP3_ZOOM2) += power.o > > COBJS := $(COBJS-y) > SRCS := $(COBJS:.o=.c) > diff --git a/board/omap3/zoom2/Makefile b/board/omap3/zoom2/Makefile > new file mode 100644 > index 0000000..088b8cb > --- /dev/null > +++ b/board/omap3/zoom2/Makefile > @@ -0,0 +1,49 @@ > +# > +# (C) Copyright 2000, 2001, 2002 > +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. > +# > +# See file CREDITS for list of people who contributed to this > +# project. > +# > +# This program is free software; you can redistribute it and/or > +# modify it under the terms of the GNU General Public License as > +# published by the Free Software Foundation; either version 2 of > +# the License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program; if not, write to the Free Software > +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, > +# MA 02111-1307 USA > +# > + > +include $(TOPDIR)/config.mk > + > +LIB = $(obj)lib$(BOARD).a > + > +COBJS := zoom2.o > + > +SRCS := $(COBJS:.o=.c) > +OBJS := $(addprefix $(obj),$(COBJS)) > + > +$(LIB): $(obj).depend $(OBJS) > + $(AR) $(ARFLAGS) $@ $(OBJS) > + > +clean: > + rm -f $(OBJS) > + > +distclean: clean > + rm -f $(LIB) core *.bak $(obj).depend > + > +######################################################################### > + > +# defines $(obj).depend target > +include $(SRCTREE)/rules.mk > + > +sinclude $(obj).depend > + > +######################################################################### > diff --git a/board/omap3/zoom2/config.mk b/board/omap3/zoom2/config.mk > new file mode 100644 > index 0000000..ef2ae97 > --- /dev/null > +++ b/board/omap3/zoom2/config.mk > @@ -0,0 +1,33 @@ > +# > +# (C) Copyright 2009 > +# Texas Instruments, <www.ti.com> > +# > +# Zoom II uses OMAP3 (ARM-CortexA8) cpu > +# see http://www.ti.com/ for more information on Texas Instruments > +# > +# See file CREDITS for list of people who contributed to this > +# project. > +# > +# This program is free software; you can redistribute it and/or > +# modify it under the terms of the GNU General Public License as > +# published by the Free Software Foundation; either version 2 of > +# the License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program; if not, write to the Free Software > +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, > +# MA 02111-1307 USA > +# > +# Physical Address: > +# 8000'0000 (bank0) > +# A000/0000 (bank1) > +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 > +# (mem base + reserved) > + > +# For use with external or internal boots. > +TEXT_BASE = 0x80e80000 > diff --git a/board/omap3/zoom2/u-boot.lds b/board/omap3/zoom2/u-boot.lds > new file mode 100644 > index 0000000..0eb318b > --- /dev/null > +++ b/board/omap3/zoom2/u-boot.lds > @@ -0,0 +1,63 @@ > +/* > + * January 2004 - Changed to support H4 device > + * Copyright (c) 2004-2008 Texas Instruments > + * > + * (C) Copyright 2002 > + * Gary Jennejohn, DENX Software Engineering, <g...@denx.de> > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") > +OUTPUT_ARCH(arm) > +ENTRY(_start) > +SECTIONS > +{ > + . = 0x00000000; > + > + . = ALIGN(4); > + .text : > + { > + cpu/arm_cortexa8/start.o (.text) > + *(.text) > + } > + > + . = ALIGN(4); > + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } > + From > + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } > + __exidx_start = .; > + .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > + __exidx_end = .; no need please remove > + > + . = ALIGN(4); > + .data : { *(.data) } > + all the omap3 share the same lds it wil be nice to regroup it as done for the at91 > + . = ALIGN(4); > + .got : { *(.got) } > + > + __u_boot_cmd_start = .; > + .u_boot_cmd : { *(.u_boot_cmd) } > + __u_boot_cmd_end = .; > + > + . = ALIGN(4); > + __bss_start = .; > + .bss : { *(.bss) } > + _end = .; > +} > diff --git a/board/omap3/zoom2/zoom2.c b/board/omap3/zoom2/zoom2.c > new file mode 100644 > index 0000000..9e47601 > --- /dev/null > +++ b/board/omap3/zoom2/zoom2.c > @@ -0,0 +1,79 @@ > +/* > + * (C) Copyright 2009 > + * Wind River > + * > + * Author : > + * Tom Rix <tom....@windriver.com> > + * > + * Derived from Zoom1 code by > + * Nishanth Menon <n...@ti.com> > + * Sunil Kumar <sunilsain...@gmail.com> > + * Shashi Ranjan <shashiranjanmc...@gmail.com> > + * Richard Woodruff <r-woodru...@ti.com> > + * Syed Mohammed Khasim <kha...@ti.com> > + * > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > +#include <common.h> > +#include <asm/io.h> > +#include <asm/arch/mux.h> > +#include <asm/arch/sys_proto.h> > +#include <asm/mach-types.h> > +#include "zoom2.h" > + > +/* > + * Routine: board_init > + * Description: Early hardware init. > + */ > +int board_init (void) > +{ > + DECLARE_GLOBAL_DATA_PTR; > + > + gpmc_init (); /* in SRAM or SDRAM, finish GPMC */ > + /* board id for Linux */ > + gd->bd->bi_arch_number = MACH_TYPE_OMAP_ZOOM2; > + /* boot param addr */ > + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); > + > + return 0; > +} > + > +/* > + * Routine: misc_init_r > + * Description: Configure zoom board specific configurations > + */ > +int misc_init_r (void) > +{ > + power_init_r (); > + dieid_num_r (); > + return 0; > +} > + > +/* > + * Routine: set_muxconf_regs > + * Description: Setting up the configuration Mux registers specific to the > + * hardware. Many pins need to be moved from protect to primary > + * mode. > + */ > +void set_muxconf_regs (void) > +{ > + /* platform specific muxes */ > + MUX_ZOOM2 (); > +} > diff --git a/board/omap3/zoom2/zoom2.h b/board/omap3/zoom2/zoom2.h > new file mode 100644 > index 0000000..c86d990 > --- /dev/null > +++ b/board/omap3/zoom2/zoom2.h > @@ -0,0 +1,134 @@ > +/* > + * (C) Copyright 2009 > + * Wind River > + * Tom Rix <tom....@windriver.com> > + * > + * Derived from: board/omap3/zoom1/zoom1.h > + * Nishanth Menon <n...@ti.com> > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > +#ifndef _BOARD_ZOOM2_H_ > +#define _BOARD_ZOOM2_H_ > + > +const omap3_sysinfo sysinfo = { > + SDP_3430_V1, > + SDP_3430_V2, > + DDR_STACKED, > + "OMAP3 Zoom2 ", > + "NAND", > +}; > + > +/* > + * IEN - Input Enable > + * IDIS - Input Disable > + * PTD - Pull type Down > + * PTU - Pull type Up > + * DIS - Pull type selection is inactive > + * EN - Pull type selection is active > + * M0 - Mode 0 > + * The commented string gives the final mux configuration for that pin > + */ > +#define MUX_ZOOM2() \ > + /*SDRC*/\ > + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ > + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ > + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ > + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ > + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ > + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ > + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ > + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ > + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ > + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ > + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ > + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ > + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ > + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ > + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ > + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ > + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ > + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ > + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ > + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ > + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ > + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ > + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ > + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ > + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ > + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ > + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ > + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ > + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ > + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ > + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ > + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ > + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ > + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ > + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ > + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ > + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ > + /*GPMC*/\ > + MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\ > + MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\ > + MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\ > + MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\ > + MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\ > + MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\ > + MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\ > + MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\ > + MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\ > + MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\ > + MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\ > + MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\ > + MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\ > + MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\ > + MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\ > + MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\ > + MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\ > + MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\ > + MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\ > + MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\ > + MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\ > + MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\ > + MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\ > + MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\ > + MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ > + MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ > + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ > + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M7)) /*GPMC_nCS1*/\ > + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M7)) /*GPMC_nCS2*/\ > + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M7)) /*GPMC_nCS3*/\ > + MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M7)) /*GPMC_nCS4*/\ > + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M7)) /*GPMC_nCS5*/\ > + MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M7)) /*GPMC_nCS6*/\ > + MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M7)) /*GPMC_nCS7*/\ > + MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ > + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ > + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ > + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ > + MUX_VAL(CP(GPMC_NWP), (IDIS | PTU | DIS | M0)) /*GPMC_nWP*/\ > + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\ > + MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nBE1*/\ > + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTD | EN | M0)) /*GPMC_WAIT0*/\ > + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ > + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_WAIT2*/\ > + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/ > + > +#endif /* _BOARD_ZOOM2_H_ */ > diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h > new file mode 100644 > index 0000000..52e5f70 > --- /dev/null > +++ b/include/configs/omap3_zoom2.h > @@ -0,0 +1,311 @@ > +/* > + * (C) Copyright 2006-2009 > + * Texas Instruments. > + * Richard Woodruff <r-woodru...@ti.com> > + * Syed Mohammed Khasim <x0kha...@ti.com> > + * Nishanth Menon <n...@ti.com> > + * Tom Rix <tom....@windriver.com> > + * > + * Configuration settings for the TI OMAP3430 Zoom II board. > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +#ifndef __CONFIG_H > +#define __CONFIG_H > +#include <asm/sizes.h> > + > +/* > + * High Level Configuration Options > + */ > +#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ > +#define CONFIG_OMAP 1 /* in a TI OMAP core */ > +#define CONFIG_OMAP34XX 1 /* which is a 34XX */ > +#define CONFIG_OMAP3430 1 /* which is in a 3430 */ > +#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */ > + > +#include <asm/arch/cpu.h> /* get chip and board defs */ > +#include <asm/arch/omap3.h> > + > +/* Clock Defines */ > +#define V_OSCK 26000000 /* Clock output from T2 > */ > +#define V_SCLK (V_OSCK >> 1) > + > +#undef CONFIG_USE_IRQ /* no support for IRQs */ > +#define CONFIG_MISC_INIT_R > + > +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ > +#define CONFIG_SETUP_MEMORY_TAGS 1 > +#define CONFIG_INITRD_TAG 1 > +#define CONFIG_REVISION_TAG 1 > + > +/* > + * Size of malloc() pool > + */ > +#define CONFIG_ENV_SIZE SZ_128K /* Total Size > Environment */ > + /* Sector */ > +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) > +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ > + /* initial data */ > + > +/* > + * Hardware drivers > + */ > + > +/* > + * NS16550 Configuration > + */ > +#define V_NS16550_CLK 48000000 /* 48MHz > (APLL96/2) */ > + > +#define CONFIG_SYS_NS16550 > +#define CONFIG_SYS_NS16550_SERIAL > +#define CONFIG_SYS_NS16550_REG_SIZE (-4) > +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK > + > +/* > + * select serial console configuration > + */ > +#define CONFIG_CONS_INDEX 3 > +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 > +#define CONFIG_SERIAL3 3 /* UART3 */ > + > +/* allow to overwrite serial and ethaddr */ > +#define CONFIG_ENV_OVERWRITE > +#define CONFIG_BAUDRATE 115200 > +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ > + 115200} > +#define CONFIG_MMC 1 > +#define CONFIG_OMAP3_MMC 1 > +#define CONFIG_DOS_PARTITION 1 > + > +/* commands to include */ > +#include <config_cmd_default.h> > + > +#define CONFIG_CMD_EXT2 /* EXT2 Support */ ^^^^^^^^^^^^^^^^^ white space please fix it > +#define CONFIG_CMD_FAT /* FAT support */ ditto and the followiing configs too > +#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ > + > +#define CONFIG_CMD_I2C /* I2C serial bus support */ > +#define CONFIG_CMD_MMC /* MMC support */ > +#define CONFIG_CMD_NAND /* NAND support */ > +#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */ > + > +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ > +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ > +#undef CONFIG_CMD_IMI /* iminfo */ > +#undef CONFIG_CMD_IMLS /* List all found images */ > +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ > +#undef CONFIG_CMD_NFS /* NFS support */ > + > +#define CONFIG_SYS_NO_FLASH > +#define CONFIG_SYS_I2C_SPEED 100000 > +#define CONFIG_SYS_I2C_SLAVE 1 > +#define CONFIG_SYS_I2C_BUS 0 > +#define CONFIG_SYS_I2C_BUS_SELECT 1 > +#define CONFIG_DRIVER_OMAP34XX_I2C 1 > + > +/* > + * Board NAND Info. > + */ > +#define CONFIG_NAND_OMAP_GPMC > +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ > + /* to access nand */ > +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ > + /* to access nand at */ > + /* CS0 */ > +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 > + > +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ > + /* devices */ > +#define SECTORSIZE 512 > + > +#define NAND_ALLOW_ERASE_ALL > +#define ADDR_COLUMN 1 > +#define ADDR_PAGE 2 > +#define ADDR_COLUMN_PAGE 3 > + > +#define NAND_ChipID_UNKNOWN 0x00 > +#define NAND_MAX_FLOORS 1 > +#define NAND_MAX_CHIPS 1 > +#define NAND_NO_RB 1 > +#define CONFIG_SYS_NAND_WP > + > +#define CONFIG_JFFS2_NAND > +/* nand device jffs2 lives on */ > +#define CONFIG_JFFS2_DEV "nand0" > +/* start of jffs2 partition */ > +#define CONFIG_JFFS2_PART_OFFSET 0x680000 > +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of > jffs2 */ you do not active the MTD_PARTS it could be usefull > + /* partition */ > + > +/* Environment information */ > +#define CONFIG_BOOTDELAY 10 > + > +#define CONFIG_EXTRA_ENV_SETTINGS \ > + "loadaddr=0x82000000\0" \ load_addr? > + "console=ttyS2,115200n8\0" \ > + "videomode=1024x...@60,vxres=1024,vyres=768\0" \ > + "videospec=omapfb:vram:2M,vram:4M\0" \ > + "mmcargs=setenv bootargs console=${console} " \ > + "video=${videospec},mode:${videomode} " \ > + "root=/dev/mmcblk0p2 rw " \ > + "rootfstype=ext3 rootwait\0" \ > + "nandargs=setenv bootargs console=${console} " \ > + "video=${videospec},mode:${videomode} " \ > + "root=/dev/mtdblock4 rw " \ > + "rootfstype=jffs2\0" \ > + "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ > + "bootscript=echo Running bootscript from mmc ...; " \ > + "autoscr ${loadaddr}\0" \ > + "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ > + "mmcboot=echo Booting from mmc ...; " \ > + "run mmcargs; " \ > + "bootm ${loadaddr}\0" \ > + "nandboot=echo Booting from nand ...; " \ > + "run nandargs; " \ > + "nand read ${loadaddr} 280000 400000; " \ > + "bootm ${loadaddr}\0" \ > + > +#define CONFIG_BOOTCOMMAND \ > + "if mmcinit; then " \ > + "if run loadbootscript; then " \ > + "run bootscript; " \ > + "else " \ > + "if run loaduimage; then " \ > + "run mmcboot; " \ > + "else run nandboot; " \ > + "fi; " \ > + "fi; " \ > + "else run nandboot; fi" > + > +#define CONFIG_AUTO_COMPLETE 1 > +/* > + * Miscellaneous configurable options > + */ > +#define V_PROMPT "OMAP3 Zoom2# " why? why not only define CONFIG_SYS_PROMPT? > + > +#define CONFIG_SYS_LONGHELP /* undef to save memory */ > +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ > +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " > +#define CONFIG_SYS_PROMPT V_PROMPT > +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ > +/* Print Buffer Size */ > +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ > + sizeof(CONFIG_SYS_PROMPT) + 16) > +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ > +/* Boot Argument Buffer Size */ > +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) > + > +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ > + /* works on */ > +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ > + 0x01F00000) /* 31MB */ > + > +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ > + > +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ > + /* load address */ > + > +/* > + * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by > + * 32KHz clk, or from external sig. This rate is divided by a local divisor. > + */ > +#define V_PVT 7 as said precedently us the 12Mhz as imput with a PVT at 1 will give us a better timer > + > +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) > +#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ > +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << > CONFIG_SYS_PVT)) > + Best Regards, J. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/8] ZOOM2 Add initial support for Zoom2
Jean-Christophe PLAGNIOL-VILLARD Thu, 02 Apr 2009 13:23:25 -0700
- Re: [U-Boot] [P... Jean-Christophe PLAGNIOL-VILLARD
- Re: [U-Boot] [PATCH 4/8] ZOO... Jean-Christophe PLAGNIOL-VILLARD
- Re: [U-Boot] [PATCH 3/8] ZOOM2 A... Jean-Christophe PLAGNIOL-VILLARD
- Re: [U-Boot] [PATCH 3/8] ZOOM2 A... Dirk Behme
- Re: [U-Boot] [PATCH 2/8] ZOOM2 Mux c... Jean-Christophe PLAGNIOL-VILLARD
- Re: [U-Boot] [PATCH 1/8] ZOOM2 Add initia... Scott Wood
- Re: [U-Boot] [PATCH 1/8] ZOOM2 Add initia... Jean-Christophe PLAGNIOL-VILLARD
- Re: [U-Boot] [PATCH 1/8] ZOOM2 Add initia... Dirk Behme
