On Wednesday 10 July 2013 07:13 PM, Tom Rini wrote:
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On 07/10/2013 09:23 AM, Nishanth Menon wrote:
On Wed, Jul 10, 2013 at 6:25 AM, Sourav Poddar
<sourav.pod...@ti.com> wrote:
From: Matt Porter<mpor...@ti.com>
I think it's good form to update folks addresses, Matt is now
matt.por...@linaro.org
Add QSPI definitions and clock configuration support.
[snip]
diff --git a/arch/arm/include/asm/arch-omap5/spl.h
b/arch/arm/include/asm/arch-omap5/spl.h index d4d353c..8905cb8
100644 --- a/arch/arm/include/asm/arch-omap5/spl.h +++
b/arch/arm/include/asm/arch-omap5/spl.h @@ -31,6 +31,7 @@
#define BOOT_DEVICE_MMC1 5 #define BOOT_DEVICE_MMC2
6 #define BOOT_DEVICE_MMC2_2 7 +#define BOOT_DEVICE_SPI 10
why not 8?
This is the value ROM passes when we boot here. What I would like to
know is, is this really "SPI" or QSPI_1 or QSPI_4 ? I suspect it's
QSPI_1. And yes, we want to be precise here because while DRA7
doesn't have McSPI AM437x will, along with QSPI.
Yes, its QSPI1.
Will explicitl define it as QSPI91/4) in next version.
- --
Tom
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