On 12/07/2013 01:03, Marek Vasut wrote:
> The MX28 multi-layer AHB bus can be too slow and trigger the
> FEC DMA too early, before all the data hit the DRAM. This patch
> ensures the data are written in the RAM before the DMA starts.
> Please see the comment in the patch for full details.
> 
> This patch was produced with an amazing help from Albert Aribaud,
> who pointed out it can possibly be such a bus synchronisation
> issue.
> 
> Signed-off-by: Marek Vasut <ma...@denx.de>
> Cc: Albert ARIBAUD <albert.u.b...@aribaud.net>
> Cc: Fabio Estevam <fabio.este...@freescale.com>
> Cc: Stefano Babic <sba...@denx.de>
> ---

Applied to u-boot-imx (fix), thanks !

Best regards,
Stefano Babic



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