Signed-off-by: Pardeep Kumar Singla <b45...@freescale.com>
---
Changes since v1:
Remove dev paramter from imx_enable_hdmi_phy function to make interface clearer.
Remove display_info_t structure.
 
 board/freescale/mx6sabresd/mx6sabresd.c |   63 ++++++++++++++++++++++++++++++-
 include/configs/mx6sabre_common.h       |    3 +-
 include/configs/mx6sabresd.h            |   19 ++++++++++
 3 files changed, 83 insertions(+), 2 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index 222ee98..faab344 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -29,7 +29,12 @@
 #include <fsl_esdhc.h>
 #include <miiphy.h>
 #include <netdev.h>
-
+#include <asm/arch/mxc_hdmi.h>
+#include <asm/arch/crm_regs.h>
+#include <linux/fb.h>
+#include <ipu_pixfmt.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
 DECLARE_GLOBAL_DATA_PTR;
 
 #define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |                  \
@@ -239,6 +244,59 @@ int board_phy_config(struct phy_device *phydev)
        return 0;
 }
 
+#if defined(CONFIG_VIDEO_IPUV3)
+static struct fb_videomode const hdmi = {
+       .name           = "HDMI",
+       .refresh        = 60,
+       .xres           = 1024,
+       .yres           = 768,
+       .pixclock       = 15385,
+       .left_margin    = 220,
+       .right_margin   = 40,
+       .upper_margin   = 21,
+       .lower_margin   = 7,
+       .hsync_len      = 60,
+       .vsync_len      = 10,
+       .sync           = FB_SYNC_EXT,
+       .vmode          = FB_VMODE_NONINTERLACED
+};
+
+int board_video_skip(void)
+{
+       int ret;
+
+       ret = ipuv3_fb_init(&hdmi, 0, IPU_PIX_FMT_RGB24);
+
+       if (ret)
+               printf("HDMI cannot be configured: %d\n", ret);
+
+       imx_enable_hdmi_phy();
+       return ret;
+}
+
+static void setup_display(void)
+{
+       struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+       int reg;
+
+       imx_setup_hdmi();
+
+       reg = readl(&mxc_ccm->chsccdr);
+       reg |= (CHSCCDR_CLK_SEL_LDB_DI0
+               << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
+       writel(reg, &mxc_ccm->chsccdr);
+}
+#endif /* CONFIG_VIDEO_IPUV3 */
+
+/*
+ * Do not overwrite the console
+ * Use always serial for U-Boot console
+ */
+int overwrite_console(void)
+{
+       return 1;
+}
+
 int board_eth_init(bd_t *bis)
 {
        int ret;
@@ -255,6 +313,9 @@ int board_eth_init(bd_t *bis)
 int board_early_init_f(void)
 {
        setup_iomux_uart();
+#if defined(CONFIG_VIDEO_IPUV3)
+       setup_display();
+#endif
 
        return 0;
 }
diff --git a/include/configs/mx6sabre_common.h 
b/include/configs/mx6sabre_common.h
index 53cc559..dd93fff 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -20,6 +20,7 @@
 #define CONFIG_MX6
 
 #include "mx6_common.h"
+#include <asm/sizes.h>
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
@@ -32,7 +33,7 @@
 #define CONFIG_REVISION_TAG
 
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN          (10 * SZ_1M)
 
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_LATE_INIT
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 76675f4..5637c19 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -17,6 +17,9 @@
 #ifndef __MX6QSABRESD_CONFIG_H
 #define __MX6QSABRESD_CONFIG_H
 
+#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
+
 #define CONFIG_MACH_TYPE       3980
 #define CONFIG_MXC_UART_BASE   UART1_BASE
 #define CONFIG_CONSOLE_DEV             "ttymxc0"
@@ -31,4 +34,20 @@
 #define CONFIG_SYS_MMC_ENV_DEV         1       /* SDHC3 */
 #endif
 
+/* Framebuffer */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_IPUV3_CLK 260000000
+#define CONFIG_IMX_HDMI
+
 #endif                         /* __MX6QSABRESD_CONFIG_H */
-- 
1.7.9.5


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