Dear Drasko DRASKOVIC, In message <5ec3d7930904071340t6b233551vbea8d95f69a95...@mail.gmail.com> you wrote: > > However, when DCache is switched on with WRITETHROUGH or WRITEBACK policy, > U-Boot stucks. Switching on only MMU and ICache works well, so I presume > that pagetables were correctly set. > > Does anybody have idea what can be wrong here? I tried invalidating both > caches and TLB before and after turning on DCache, but I get the same > result.
This is pretty normal. Many accesses to memory mapped device registers and things like that will stop working if you by accident enable caching for such areas. Also many devcie drivers are probably missing appropriate memory barrier instructions etc. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "How is this place run - is it an anarchy?" "No, I wouldn't say so; it is not that well organised..." _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
