I have a self-designed board which is based on MPC8548PC demo board, but CPU is MPC8547E. I configured PCI to PCI-X 64bits asynchrous mode, 100MHz, and there were two SATA controllers connected directly to BUS #0. U-boot version is 1.1.4 which is previouly for MPC8548PC demo board, I have modified some code for my board. After power on, uboot can print some information, when it comes to PCI bus scan, CPU died. The messages is like this: U-Boot 1.1.4 (Apr 13 2009 - 19:42:42)
CPU: 8547_E, Version: 2.0, (0x80390120) Core: e500v2, Version: 2.0, (0x80210020) Clock Configuration: CPU: 999 MHz, CCB: 399 MHz, DDR: 199 MHz, LBC: 24 MHz L1: D-cache 32 kB enabled I-cache 32 kB enabled Board: MPC85xx Processor Card Rev. A. -- Boot Flash is U30 SerDes Interface is enabled PEX : X8 2.5Gbps, Root Complex PCI1: 64 bit, async, Host PCI2: disabled I2C: ready DRAM: Initializing ..init ECC from 10000000 to 10000100 SDRAM test phase 1: SDRAM test phase 2: SDRAM test passed. DDR: 512 MB Top of RAM usable for U-Boot at: 20000000 Reserving 180k for U-Boot at: 1ffd0000 Reserving 136k for malloc() at: 1ffae000 Reserving 80 Bytes for Board Info at: 1ffadfb0 Reserving 48 Bytes for Global Data at: 1ffadf80 Stack Pointer at: 1ffadf68 New Stack Pointer is: 1ffadf68 Now running in RAM - U-Boot at: 1ffd0000 FLASH: flash_get_size: man id = 0100 flash_get_size: device id1 = 7e22 flash_get_size: device id2 = 2122 flash_get_size: device id3 = 0122 flash_get_size: flash id = 00700000 flash_get_size: man id = 0100 flash_get_size: device id1 = 7e22 flash_get_size: device id2 = 2122 flash_get_size: device id3 = 0122 flash_get_size: flash id = 00700000 flash_protect ON: from 0xFFF80000 to 0xFFFA85FF protect on 124 protect on 125 flash_protect ON: from 0xFFF60000 to 0xFFF7FFFF protect on 123 32 MB L2 cache 512KB: enabled PORPLLSR = 0x00c54018 PORBMSR = 0x86370000 PORIMPSCR = 0x0003007f PORDEVSR = 0x023aea61 DEVDISR = 0x500c0000 Do you want to skip PCI initialization?(y/n, 5 seconds left): Init PCI1 in pci_mpc85xx_init ... after pci_set_region after pci_setup_indirect Outbound register1 has been initilized Outbound register2 has been initilized Inbound register has been initilized Register hose 1: reg16 = 0x00000004 2: reg16 = 0x00000106 In pci_mpc85xx_init: vendor = 0x00001057 In pci_mpc85xx_init: device = 0x00000018 Clear non-reserved bits in status register bridge = 0x00000000 PCIX init...: PCIX_COMMAND = 0x00000030 PCIX_STATUS = 0x1fff98b8 Done! To get last bus number: pciauto_config_init: ENTER Middle PCI Autoconfig: Memory region: [80000000-8fffffff] PCI Autoconfig: I/O region: [e2000000-e27fffff] pciauto_config_init: EXIT pci_hose_scan_bus: ENTER <cpu died> Interestingly, when I confiured PCI to PCI 32bits mode, uboot can run normally. I have doubt whether this version of uboot code support PCIX mode, if so where should I do to support PCIX mode? -- The simplest is not all best but the best is surely the simplest! _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot